xref: /qemu/include/hw/xen/interface/arch-x86/cpuid.h (revision 50c88402ca599e577f025e78a4380431be2b3f6d)
1*50c88402SJoao Martins /******************************************************************************
2*50c88402SJoao Martins  * arch-x86/cpuid.h
3*50c88402SJoao Martins  *
4*50c88402SJoao Martins  * CPUID interface to Xen.
5*50c88402SJoao Martins  *
6*50c88402SJoao Martins  * Permission is hereby granted, free of charge, to any person obtaining a copy
7*50c88402SJoao Martins  * of this software and associated documentation files (the "Software"), to
8*50c88402SJoao Martins  * deal in the Software without restriction, including without limitation the
9*50c88402SJoao Martins  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10*50c88402SJoao Martins  * sell copies of the Software, and to permit persons to whom the Software is
11*50c88402SJoao Martins  * furnished to do so, subject to the following conditions:
12*50c88402SJoao Martins  *
13*50c88402SJoao Martins  * The above copyright notice and this permission notice shall be included in
14*50c88402SJoao Martins  * all copies or substantial portions of the Software.
15*50c88402SJoao Martins  *
16*50c88402SJoao Martins  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17*50c88402SJoao Martins  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18*50c88402SJoao Martins  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19*50c88402SJoao Martins  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20*50c88402SJoao Martins  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21*50c88402SJoao Martins  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22*50c88402SJoao Martins  * DEALINGS IN THE SOFTWARE.
23*50c88402SJoao Martins  *
24*50c88402SJoao Martins  * Copyright (c) 2007 Citrix Systems, Inc.
25*50c88402SJoao Martins  *
26*50c88402SJoao Martins  * Authors:
27*50c88402SJoao Martins  *    Keir Fraser <keir@xen.org>
28*50c88402SJoao Martins  */
29*50c88402SJoao Martins 
30*50c88402SJoao Martins #ifndef __XEN_PUBLIC_ARCH_X86_CPUID_H__
31*50c88402SJoao Martins #define __XEN_PUBLIC_ARCH_X86_CPUID_H__
32*50c88402SJoao Martins 
33*50c88402SJoao Martins /*
34*50c88402SJoao Martins  * For compatibility with other hypervisor interfaces, the Xen cpuid leaves
35*50c88402SJoao Martins  * can be found at the first otherwise unused 0x100 aligned boundary starting
36*50c88402SJoao Martins  * from 0x40000000.
37*50c88402SJoao Martins  *
38*50c88402SJoao Martins  * e.g If viridian extensions are enabled for an HVM domain, the Xen cpuid
39*50c88402SJoao Martins  * leaves will start at 0x40000100
40*50c88402SJoao Martins  */
41*50c88402SJoao Martins 
42*50c88402SJoao Martins #define XEN_CPUID_FIRST_LEAF 0x40000000
43*50c88402SJoao Martins #define XEN_CPUID_LEAF(i)    (XEN_CPUID_FIRST_LEAF + (i))
44*50c88402SJoao Martins 
45*50c88402SJoao Martins /*
46*50c88402SJoao Martins  * Leaf 1 (0x40000x00)
47*50c88402SJoao Martins  * EAX: Largest Xen-information leaf. All leaves up to an including @EAX
48*50c88402SJoao Martins  *      are supported by the Xen host.
49*50c88402SJoao Martins  * EBX-EDX: "XenVMMXenVMM" signature, allowing positive identification
50*50c88402SJoao Martins  *      of a Xen host.
51*50c88402SJoao Martins  */
52*50c88402SJoao Martins #define XEN_CPUID_SIGNATURE_EBX 0x566e6558 /* "XenV" */
53*50c88402SJoao Martins #define XEN_CPUID_SIGNATURE_ECX 0x65584d4d /* "MMXe" */
54*50c88402SJoao Martins #define XEN_CPUID_SIGNATURE_EDX 0x4d4d566e /* "nVMM" */
55*50c88402SJoao Martins 
56*50c88402SJoao Martins /*
57*50c88402SJoao Martins  * Leaf 2 (0x40000x01)
58*50c88402SJoao Martins  * EAX[31:16]: Xen major version.
59*50c88402SJoao Martins  * EAX[15: 0]: Xen minor version.
60*50c88402SJoao Martins  * EBX-EDX: Reserved (currently all zeroes).
61*50c88402SJoao Martins  */
62*50c88402SJoao Martins 
63*50c88402SJoao Martins /*
64*50c88402SJoao Martins  * Leaf 3 (0x40000x02)
65*50c88402SJoao Martins  * EAX: Number of hypercall transfer pages. This register is always guaranteed
66*50c88402SJoao Martins  *      to specify one hypercall page.
67*50c88402SJoao Martins  * EBX: Base address of Xen-specific MSRs.
68*50c88402SJoao Martins  * ECX: Features 1. Unused bits are set to zero.
69*50c88402SJoao Martins  * EDX: Features 2. Unused bits are set to zero.
70*50c88402SJoao Martins  */
71*50c88402SJoao Martins 
72*50c88402SJoao Martins /* Does the host support MMU_PT_UPDATE_PRESERVE_AD for this guest? */
73*50c88402SJoao Martins #define _XEN_CPUID_FEAT1_MMU_PT_UPDATE_PRESERVE_AD 0
74*50c88402SJoao Martins #define XEN_CPUID_FEAT1_MMU_PT_UPDATE_PRESERVE_AD  (1u<<0)
75*50c88402SJoao Martins 
76*50c88402SJoao Martins /*
77*50c88402SJoao Martins  * Leaf 4 (0x40000x03)
78*50c88402SJoao Martins  * Sub-leaf 0: EAX: bit 0: emulated tsc
79*50c88402SJoao Martins  *                  bit 1: host tsc is known to be reliable
80*50c88402SJoao Martins  *                  bit 2: RDTSCP instruction available
81*50c88402SJoao Martins  *             EBX: tsc_mode: 0=default (emulate if necessary), 1=emulate,
82*50c88402SJoao Martins  *                            2=no emulation, 3=no emulation + TSC_AUX support
83*50c88402SJoao Martins  *             ECX: guest tsc frequency in kHz
84*50c88402SJoao Martins  *             EDX: guest tsc incarnation (migration count)
85*50c88402SJoao Martins  * Sub-leaf 1: EAX: tsc offset low part
86*50c88402SJoao Martins  *             EBX: tsc offset high part
87*50c88402SJoao Martins  *             ECX: multiplicator for tsc->ns conversion
88*50c88402SJoao Martins  *             EDX: shift amount for tsc->ns conversion
89*50c88402SJoao Martins  * Sub-leaf 2: EAX: host tsc frequency in kHz
90*50c88402SJoao Martins  */
91*50c88402SJoao Martins 
92*50c88402SJoao Martins /*
93*50c88402SJoao Martins  * Leaf 5 (0x40000x04)
94*50c88402SJoao Martins  * HVM-specific features
95*50c88402SJoao Martins  * Sub-leaf 0: EAX: Features
96*50c88402SJoao Martins  * Sub-leaf 0: EBX: vcpu id (iff EAX has XEN_HVM_CPUID_VCPU_ID_PRESENT flag)
97*50c88402SJoao Martins  * Sub-leaf 0: ECX: domain id (iff EAX has XEN_HVM_CPUID_DOMID_PRESENT flag)
98*50c88402SJoao Martins  */
99*50c88402SJoao Martins #define XEN_HVM_CPUID_APIC_ACCESS_VIRT (1u << 0) /* Virtualized APIC registers */
100*50c88402SJoao Martins #define XEN_HVM_CPUID_X2APIC_VIRT      (1u << 1) /* Virtualized x2APIC accesses */
101*50c88402SJoao Martins /* Memory mapped from other domains has valid IOMMU entries */
102*50c88402SJoao Martins #define XEN_HVM_CPUID_IOMMU_MAPPINGS   (1u << 2)
103*50c88402SJoao Martins #define XEN_HVM_CPUID_VCPU_ID_PRESENT  (1u << 3) /* vcpu id is present in EBX */
104*50c88402SJoao Martins #define XEN_HVM_CPUID_DOMID_PRESENT    (1u << 4) /* domid is present in ECX */
105*50c88402SJoao Martins 
106*50c88402SJoao Martins /*
107*50c88402SJoao Martins  * Leaf 6 (0x40000x05)
108*50c88402SJoao Martins  * PV-specific parameters
109*50c88402SJoao Martins  * Sub-leaf 0: EAX: max available sub-leaf
110*50c88402SJoao Martins  * Sub-leaf 0: EBX: bits 0-7: max machine address width
111*50c88402SJoao Martins  */
112*50c88402SJoao Martins 
113*50c88402SJoao Martins /* Max. address width in bits taking memory hotplug into account. */
114*50c88402SJoao Martins #define XEN_CPUID_MACHINE_ADDRESS_WIDTH_MASK (0xffu << 0)
115*50c88402SJoao Martins 
116*50c88402SJoao Martins #define XEN_CPUID_MAX_NUM_LEAVES 5
117*50c88402SJoao Martins 
118*50c88402SJoao Martins #endif /* __XEN_PUBLIC_ARCH_X86_CPUID_H__ */
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