1 /* 2 * Virtio GPU Device 3 * 4 * Copyright Red Hat, Inc. 2013-2014 5 * 6 * Authors: 7 * Dave Airlie <airlied@redhat.com> 8 * Gerd Hoffmann <kraxel@redhat.com> 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2. 11 * See the COPYING file in the top-level directory. 12 */ 13 14 #ifndef HW_VIRTIO_GPU_H 15 #define HW_VIRTIO_GPU_H 16 17 #include "qemu/queue.h" 18 #include "ui/qemu-pixman.h" 19 #include "ui/console.h" 20 #include "hw/virtio/virtio.h" 21 #include "qemu/log.h" 22 23 #include "standard-headers/linux/virtio_gpu.h" 24 25 /* Not yet(?) defined in standard-headers, remove when possible */ 26 #ifndef VIRTIO_GPU_CAPSET_VIRGL2 27 #define VIRTIO_GPU_CAPSET_VIRGL2 2 28 #endif 29 30 #define TYPE_VIRTIO_GPU "virtio-gpu-device" 31 #define VIRTIO_GPU(obj) \ 32 OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU) 33 34 #define VIRTIO_ID_GPU 16 35 36 struct virtio_gpu_simple_resource { 37 uint32_t resource_id; 38 uint32_t width; 39 uint32_t height; 40 uint32_t format; 41 uint64_t *addrs; 42 struct iovec *iov; 43 unsigned int iov_cnt; 44 uint32_t scanout_bitmask; 45 pixman_image_t *image; 46 uint64_t hostmem; 47 QTAILQ_ENTRY(virtio_gpu_simple_resource) next; 48 }; 49 50 struct virtio_gpu_scanout { 51 QemuConsole *con; 52 DisplaySurface *ds; 53 uint32_t width, height; 54 int x, y; 55 int invalidate; 56 uint32_t resource_id; 57 struct virtio_gpu_update_cursor cursor; 58 QEMUCursor *current_cursor; 59 }; 60 61 struct virtio_gpu_requested_state { 62 uint32_t width, height; 63 int x, y; 64 }; 65 66 enum virtio_gpu_conf_flags { 67 VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1, 68 VIRTIO_GPU_FLAG_STATS_ENABLED, 69 }; 70 71 #define virtio_gpu_virgl_enabled(_cfg) \ 72 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED)) 73 #define virtio_gpu_stats_enabled(_cfg) \ 74 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED)) 75 76 struct virtio_gpu_conf { 77 uint64_t max_hostmem; 78 uint32_t max_outputs; 79 uint32_t flags; 80 uint32_t xres; 81 uint32_t yres; 82 }; 83 84 struct virtio_gpu_ctrl_command { 85 VirtQueueElement elem; 86 VirtQueue *vq; 87 struct virtio_gpu_ctrl_hdr cmd_hdr; 88 uint32_t error; 89 bool waiting; 90 bool finished; 91 QTAILQ_ENTRY(virtio_gpu_ctrl_command) next; 92 }; 93 94 typedef struct VirtIOGPU { 95 VirtIODevice parent_obj; 96 97 QEMUBH *ctrl_bh; 98 QEMUBH *cursor_bh; 99 VirtQueue *ctrl_vq; 100 VirtQueue *cursor_vq; 101 102 int enable; 103 104 int config_size; 105 DeviceState *qdev; 106 107 QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist; 108 QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq; 109 QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq; 110 111 struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; 112 struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS]; 113 114 struct virtio_gpu_conf conf; 115 uint64_t hostmem; 116 int enabled_output_bitmask; 117 struct virtio_gpu_config virtio_config; 118 119 bool use_virgl_renderer; 120 bool renderer_inited; 121 int renderer_blocked; 122 QEMUTimer *fence_poll; 123 QEMUTimer *print_stats; 124 125 uint32_t inflight; 126 struct { 127 uint32_t max_inflight; 128 uint32_t requests; 129 uint32_t req_3d; 130 uint32_t bytes_3d; 131 } stats; 132 133 Error *migration_blocker; 134 } VirtIOGPU; 135 136 extern const GraphicHwOps virtio_gpu_ops; 137 138 /* to share between PCI and VGA */ 139 #define DEFINE_VIRTIO_GPU_PCI_PROPERTIES(_state) \ 140 DEFINE_PROP_BIT("ioeventfd", _state, flags, \ 141 VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false), \ 142 DEFINE_PROP_UINT32("vectors", _state, nvectors, 3) 143 144 #define VIRTIO_GPU_FILL_CMD(out) do { \ 145 size_t s; \ 146 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \ 147 &out, sizeof(out)); \ 148 if (s != sizeof(out)) { \ 149 qemu_log_mask(LOG_GUEST_ERROR, \ 150 "%s: command size incorrect %zu vs %zu\n", \ 151 __func__, s, sizeof(out)); \ 152 return; \ 153 } \ 154 } while (0) 155 156 /* virtio-gpu.c */ 157 void virtio_gpu_ctrl_response(VirtIOGPU *g, 158 struct virtio_gpu_ctrl_command *cmd, 159 struct virtio_gpu_ctrl_hdr *resp, 160 size_t resp_len); 161 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g, 162 struct virtio_gpu_ctrl_command *cmd, 163 enum virtio_gpu_ctrl_type type); 164 void virtio_gpu_get_display_info(VirtIOGPU *g, 165 struct virtio_gpu_ctrl_command *cmd); 166 int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab, 167 struct virtio_gpu_ctrl_command *cmd, 168 uint64_t **addr, struct iovec **iov); 169 void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count); 170 void virtio_gpu_process_cmdq(VirtIOGPU *g); 171 172 /* virtio-gpu-3d.c */ 173 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 174 struct virtio_gpu_ctrl_command *cmd); 175 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g); 176 void virtio_gpu_virgl_reset(VirtIOGPU *g); 177 void virtio_gpu_gl_block(void *opaque, bool block); 178 int virtio_gpu_virgl_init(VirtIOGPU *g); 179 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g); 180 #endif 181