10f5d1d2aSGreg Kurz /* 20f5d1d2aSGreg Kurz * Virtio Accessor Support: In case your target can change endian. 30f5d1d2aSGreg Kurz * 40f5d1d2aSGreg Kurz * Copyright IBM, Corp. 2013 50f5d1d2aSGreg Kurz * 60f5d1d2aSGreg Kurz * Authors: 70f5d1d2aSGreg Kurz * Rusty Russell <rusty@au.ibm.com> 80f5d1d2aSGreg Kurz * 90f5d1d2aSGreg Kurz * This program is free software; you can redistribute it and/or modify 100f5d1d2aSGreg Kurz * it under the terms of the GNU General Public License as published by 110f5d1d2aSGreg Kurz * the Free Software Foundation, either version 2 of the License, or 120f5d1d2aSGreg Kurz * (at your option) any later version. 130f5d1d2aSGreg Kurz * 140f5d1d2aSGreg Kurz */ 150f5d1d2aSGreg Kurz #ifndef _QEMU_VIRTIO_ACCESS_H 160f5d1d2aSGreg Kurz #define _QEMU_VIRTIO_ACCESS_H 170f5d1d2aSGreg Kurz #include "hw/virtio/virtio.h" 180f5d1d2aSGreg Kurz #include "exec/address-spaces.h" 190f5d1d2aSGreg Kurz 20*c02d7030SGreg Kurz #if defined(TARGET_PPC64) || defined(TARGET_ARM) 21*c02d7030SGreg Kurz #define LEGACY_VIRTIO_IS_BIENDIAN 1 22*c02d7030SGreg Kurz #endif 23*c02d7030SGreg Kurz 240f5d1d2aSGreg Kurz static inline bool virtio_access_is_big_endian(VirtIODevice *vdev) 250f5d1d2aSGreg Kurz { 26*c02d7030SGreg Kurz #if defined(LEGACY_VIRTIO_IS_BIENDIAN) 27e5157e31SGreg Kurz return virtio_is_big_endian(vdev); 28e5157e31SGreg Kurz #elif defined(TARGET_WORDS_BIGENDIAN) 2995129d6fSCornelia Huck if (virtio_vdev_has_feature(vdev, VIRTIO_F_VERSION_1)) { 303c185597SCornelia Huck /* Devices conforming to VIRTIO 1.0 or later are always LE. */ 313c185597SCornelia Huck return false; 323c185597SCornelia Huck } 330f5d1d2aSGreg Kurz return true; 340f5d1d2aSGreg Kurz #else 350f5d1d2aSGreg Kurz return false; 360f5d1d2aSGreg Kurz #endif 370f5d1d2aSGreg Kurz } 380f5d1d2aSGreg Kurz 390f5d1d2aSGreg Kurz static inline uint16_t virtio_lduw_phys(VirtIODevice *vdev, hwaddr pa) 400f5d1d2aSGreg Kurz { 410f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 420f5d1d2aSGreg Kurz return lduw_be_phys(&address_space_memory, pa); 430f5d1d2aSGreg Kurz } 440f5d1d2aSGreg Kurz return lduw_le_phys(&address_space_memory, pa); 450f5d1d2aSGreg Kurz } 460f5d1d2aSGreg Kurz 470f5d1d2aSGreg Kurz static inline uint32_t virtio_ldl_phys(VirtIODevice *vdev, hwaddr pa) 480f5d1d2aSGreg Kurz { 490f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 500f5d1d2aSGreg Kurz return ldl_be_phys(&address_space_memory, pa); 510f5d1d2aSGreg Kurz } 520f5d1d2aSGreg Kurz return ldl_le_phys(&address_space_memory, pa); 530f5d1d2aSGreg Kurz } 540f5d1d2aSGreg Kurz 550f5d1d2aSGreg Kurz static inline uint64_t virtio_ldq_phys(VirtIODevice *vdev, hwaddr pa) 560f5d1d2aSGreg Kurz { 570f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 580f5d1d2aSGreg Kurz return ldq_be_phys(&address_space_memory, pa); 590f5d1d2aSGreg Kurz } 600f5d1d2aSGreg Kurz return ldq_le_phys(&address_space_memory, pa); 610f5d1d2aSGreg Kurz } 620f5d1d2aSGreg Kurz 630f5d1d2aSGreg Kurz static inline void virtio_stw_phys(VirtIODevice *vdev, hwaddr pa, 640f5d1d2aSGreg Kurz uint16_t value) 650f5d1d2aSGreg Kurz { 660f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 670f5d1d2aSGreg Kurz stw_be_phys(&address_space_memory, pa, value); 680f5d1d2aSGreg Kurz } else { 690f5d1d2aSGreg Kurz stw_le_phys(&address_space_memory, pa, value); 700f5d1d2aSGreg Kurz } 710f5d1d2aSGreg Kurz } 720f5d1d2aSGreg Kurz 730f5d1d2aSGreg Kurz static inline void virtio_stl_phys(VirtIODevice *vdev, hwaddr pa, 740f5d1d2aSGreg Kurz uint32_t value) 750f5d1d2aSGreg Kurz { 760f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 770f5d1d2aSGreg Kurz stl_be_phys(&address_space_memory, pa, value); 780f5d1d2aSGreg Kurz } else { 790f5d1d2aSGreg Kurz stl_le_phys(&address_space_memory, pa, value); 800f5d1d2aSGreg Kurz } 810f5d1d2aSGreg Kurz } 820f5d1d2aSGreg Kurz 830f5d1d2aSGreg Kurz static inline void virtio_stw_p(VirtIODevice *vdev, void *ptr, uint16_t v) 840f5d1d2aSGreg Kurz { 850f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 860f5d1d2aSGreg Kurz stw_be_p(ptr, v); 870f5d1d2aSGreg Kurz } else { 880f5d1d2aSGreg Kurz stw_le_p(ptr, v); 890f5d1d2aSGreg Kurz } 900f5d1d2aSGreg Kurz } 910f5d1d2aSGreg Kurz 920f5d1d2aSGreg Kurz static inline void virtio_stl_p(VirtIODevice *vdev, void *ptr, uint32_t v) 930f5d1d2aSGreg Kurz { 940f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 950f5d1d2aSGreg Kurz stl_be_p(ptr, v); 960f5d1d2aSGreg Kurz } else { 970f5d1d2aSGreg Kurz stl_le_p(ptr, v); 980f5d1d2aSGreg Kurz } 990f5d1d2aSGreg Kurz } 1000f5d1d2aSGreg Kurz 1010f5d1d2aSGreg Kurz static inline void virtio_stq_p(VirtIODevice *vdev, void *ptr, uint64_t v) 1020f5d1d2aSGreg Kurz { 1030f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 1040f5d1d2aSGreg Kurz stq_be_p(ptr, v); 1050f5d1d2aSGreg Kurz } else { 1060f5d1d2aSGreg Kurz stq_le_p(ptr, v); 1070f5d1d2aSGreg Kurz } 1080f5d1d2aSGreg Kurz } 1090f5d1d2aSGreg Kurz 1100f5d1d2aSGreg Kurz static inline int virtio_lduw_p(VirtIODevice *vdev, const void *ptr) 1110f5d1d2aSGreg Kurz { 1120f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 1130f5d1d2aSGreg Kurz return lduw_be_p(ptr); 1140f5d1d2aSGreg Kurz } else { 1150f5d1d2aSGreg Kurz return lduw_le_p(ptr); 1160f5d1d2aSGreg Kurz } 1170f5d1d2aSGreg Kurz } 1180f5d1d2aSGreg Kurz 1190f5d1d2aSGreg Kurz static inline int virtio_ldl_p(VirtIODevice *vdev, const void *ptr) 1200f5d1d2aSGreg Kurz { 1210f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 1220f5d1d2aSGreg Kurz return ldl_be_p(ptr); 1230f5d1d2aSGreg Kurz } else { 1240f5d1d2aSGreg Kurz return ldl_le_p(ptr); 1250f5d1d2aSGreg Kurz } 1260f5d1d2aSGreg Kurz } 1270f5d1d2aSGreg Kurz 1280f5d1d2aSGreg Kurz static inline uint64_t virtio_ldq_p(VirtIODevice *vdev, const void *ptr) 1290f5d1d2aSGreg Kurz { 1300f5d1d2aSGreg Kurz if (virtio_access_is_big_endian(vdev)) { 1310f5d1d2aSGreg Kurz return ldq_be_p(ptr); 1320f5d1d2aSGreg Kurz } else { 1330f5d1d2aSGreg Kurz return ldq_le_p(ptr); 1340f5d1d2aSGreg Kurz } 1350f5d1d2aSGreg Kurz } 1360f5d1d2aSGreg Kurz 1370f5d1d2aSGreg Kurz static inline uint16_t virtio_tswap16(VirtIODevice *vdev, uint16_t s) 1380f5d1d2aSGreg Kurz { 1390f5d1d2aSGreg Kurz #ifdef HOST_WORDS_BIGENDIAN 1400f5d1d2aSGreg Kurz return virtio_access_is_big_endian(vdev) ? s : bswap16(s); 1410f5d1d2aSGreg Kurz #else 1420f5d1d2aSGreg Kurz return virtio_access_is_big_endian(vdev) ? bswap16(s) : s; 1430f5d1d2aSGreg Kurz #endif 1440f5d1d2aSGreg Kurz } 1450f5d1d2aSGreg Kurz 1460f5d1d2aSGreg Kurz static inline void virtio_tswap16s(VirtIODevice *vdev, uint16_t *s) 1470f5d1d2aSGreg Kurz { 1480f5d1d2aSGreg Kurz *s = virtio_tswap16(vdev, *s); 1490f5d1d2aSGreg Kurz } 1500f5d1d2aSGreg Kurz 1510f5d1d2aSGreg Kurz static inline uint32_t virtio_tswap32(VirtIODevice *vdev, uint32_t s) 1520f5d1d2aSGreg Kurz { 1530f5d1d2aSGreg Kurz #ifdef HOST_WORDS_BIGENDIAN 1540f5d1d2aSGreg Kurz return virtio_access_is_big_endian(vdev) ? s : bswap32(s); 1550f5d1d2aSGreg Kurz #else 1560f5d1d2aSGreg Kurz return virtio_access_is_big_endian(vdev) ? bswap32(s) : s; 1570f5d1d2aSGreg Kurz #endif 1580f5d1d2aSGreg Kurz } 1590f5d1d2aSGreg Kurz 1600f5d1d2aSGreg Kurz static inline void virtio_tswap32s(VirtIODevice *vdev, uint32_t *s) 1610f5d1d2aSGreg Kurz { 1620f5d1d2aSGreg Kurz *s = virtio_tswap32(vdev, *s); 1630f5d1d2aSGreg Kurz } 1640f5d1d2aSGreg Kurz 1650f5d1d2aSGreg Kurz static inline uint64_t virtio_tswap64(VirtIODevice *vdev, uint64_t s) 1660f5d1d2aSGreg Kurz { 1670f5d1d2aSGreg Kurz #ifdef HOST_WORDS_BIGENDIAN 1680f5d1d2aSGreg Kurz return virtio_access_is_big_endian(vdev) ? s : bswap64(s); 1690f5d1d2aSGreg Kurz #else 1700f5d1d2aSGreg Kurz return virtio_access_is_big_endian(vdev) ? bswap64(s) : s; 1710f5d1d2aSGreg Kurz #endif 1720f5d1d2aSGreg Kurz } 1730f5d1d2aSGreg Kurz 1740f5d1d2aSGreg Kurz static inline void virtio_tswap64s(VirtIODevice *vdev, uint64_t *s) 1750f5d1d2aSGreg Kurz { 1760f5d1d2aSGreg Kurz *s = virtio_tswap64(vdev, *s); 1770f5d1d2aSGreg Kurz } 1780f5d1d2aSGreg Kurz #endif /* _QEMU_VIRTIO_ACCESS_H */ 179