1 #ifndef ALLWINNER_A10_PIT_H 2 #define ALLWINNER_A10_PIT_H 3 4 #include "hw/ptimer.h" 5 #include "hw/sysbus.h" 6 #include "qom/object.h" 7 8 #define TYPE_AW_A10_PIT "allwinner-A10-timer" 9 typedef struct AwA10PITState AwA10PITState; 10 #define AW_A10_PIT(obj) OBJECT_CHECK(AwA10PITState, (obj), TYPE_AW_A10_PIT) 11 12 #define AW_A10_PIT_TIMER_NR 6 13 #define AW_A10_PIT_TIMER_IRQ 0x1 14 #define AW_A10_PIT_WDOG_IRQ 0x100 15 16 #define AW_A10_PIT_TIMER_IRQ_EN 0 17 #define AW_A10_PIT_TIMER_IRQ_ST 0x4 18 19 #define AW_A10_PIT_TIMER_CONTROL 0x0 20 #define AW_A10_PIT_TIMER_EN 0x1 21 #define AW_A10_PIT_TIMER_RELOAD 0x2 22 #define AW_A10_PIT_TIMER_MODE 0x80 23 24 #define AW_A10_PIT_TIMER_INTERVAL 0x4 25 #define AW_A10_PIT_TIMER_COUNT 0x8 26 #define AW_A10_PIT_WDOG_CONTROL 0x90 27 #define AW_A10_PIT_WDOG_MODE 0x94 28 29 #define AW_A10_PIT_COUNT_CTL 0xa0 30 #define AW_A10_PIT_COUNT_RL_EN 0x2 31 #define AW_A10_PIT_COUNT_CLR_EN 0x1 32 #define AW_A10_PIT_COUNT_LO 0xa4 33 #define AW_A10_PIT_COUNT_HI 0xa8 34 35 #define AW_A10_PIT_TIMER_BASE 0x10 36 #define AW_A10_PIT_TIMER_BASE_END \ 37 (AW_A10_PIT_TIMER_BASE * 6 + AW_A10_PIT_TIMER_COUNT) 38 39 #define AW_A10_PIT_DEFAULT_CLOCK 0x4 40 41 42 typedef struct AwA10TimerContext { 43 AwA10PITState *container; 44 int index; 45 } AwA10TimerContext; 46 47 struct AwA10PITState { 48 /*< private >*/ 49 SysBusDevice parent_obj; 50 /*< public >*/ 51 qemu_irq irq[AW_A10_PIT_TIMER_NR]; 52 ptimer_state * timer[AW_A10_PIT_TIMER_NR]; 53 AwA10TimerContext timer_context[AW_A10_PIT_TIMER_NR]; 54 MemoryRegion iomem; 55 uint32_t clk_freq[4]; 56 57 uint32_t irq_enable; 58 uint32_t irq_status; 59 uint32_t control[AW_A10_PIT_TIMER_NR]; 60 uint32_t interval[AW_A10_PIT_TIMER_NR]; 61 uint32_t count[AW_A10_PIT_TIMER_NR]; 62 uint32_t watch_dog_mode; 63 uint32_t watch_dog_control; 64 uint32_t count_lo; 65 uint32_t count_hi; 66 uint32_t count_ctl; 67 }; 68 69 #endif 70