xref: /qemu/include/hw/ssi/pl022.h (revision 1d52866f5a53feef036c2e8f9b3a6a30209d48a7)
1*1d52866fSPeter Maydell /*
2*1d52866fSPeter Maydell  * ARM PrimeCell PL022 Synchronous Serial Port
3*1d52866fSPeter Maydell  *
4*1d52866fSPeter Maydell  * Copyright (c) 2007 CodeSourcery.
5*1d52866fSPeter Maydell  * Written by Paul Brook
6*1d52866fSPeter Maydell  *
7*1d52866fSPeter Maydell  * This program is free software; you can redistribute it and/or modify
8*1d52866fSPeter Maydell  * it under the terms of the GNU General Public License version 2 or
9*1d52866fSPeter Maydell  * (at your option) any later version.
10*1d52866fSPeter Maydell  */
11*1d52866fSPeter Maydell 
12*1d52866fSPeter Maydell /* This is a model of the Arm PrimeCell PL022 synchronous serial port.
13*1d52866fSPeter Maydell  * The PL022 TRM is:
14*1d52866fSPeter Maydell  * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0194h/DDI0194H_ssp_pl022_trm.pdf
15*1d52866fSPeter Maydell  *
16*1d52866fSPeter Maydell  * QEMU interface:
17*1d52866fSPeter Maydell  * + sysbus IRQ: SSPINTR combined interrupt line
18*1d52866fSPeter Maydell  * + sysbus MMIO region 0: MemoryRegion for the device's registers
19*1d52866fSPeter Maydell  */
20*1d52866fSPeter Maydell 
21*1d52866fSPeter Maydell #ifndef HW_SSI_PL022_H
22*1d52866fSPeter Maydell #define HW_SSI_PL022_H
23*1d52866fSPeter Maydell 
24*1d52866fSPeter Maydell #include "hw/sysbus.h"
25*1d52866fSPeter Maydell 
26*1d52866fSPeter Maydell #define TYPE_PL022 "pl022"
27*1d52866fSPeter Maydell #define PL022(obj) OBJECT_CHECK(PL022State, (obj), TYPE_PL022)
28*1d52866fSPeter Maydell 
29*1d52866fSPeter Maydell typedef struct PL022State {
30*1d52866fSPeter Maydell     SysBusDevice parent_obj;
31*1d52866fSPeter Maydell 
32*1d52866fSPeter Maydell     MemoryRegion iomem;
33*1d52866fSPeter Maydell     uint32_t cr0;
34*1d52866fSPeter Maydell     uint32_t cr1;
35*1d52866fSPeter Maydell     uint32_t bitmask;
36*1d52866fSPeter Maydell     uint32_t sr;
37*1d52866fSPeter Maydell     uint32_t cpsr;
38*1d52866fSPeter Maydell     uint32_t is;
39*1d52866fSPeter Maydell     uint32_t im;
40*1d52866fSPeter Maydell     /* The FIFO head points to the next empty entry.  */
41*1d52866fSPeter Maydell     int tx_fifo_head;
42*1d52866fSPeter Maydell     int rx_fifo_head;
43*1d52866fSPeter Maydell     int tx_fifo_len;
44*1d52866fSPeter Maydell     int rx_fifo_len;
45*1d52866fSPeter Maydell     uint16_t tx_fifo[8];
46*1d52866fSPeter Maydell     uint16_t rx_fifo[8];
47*1d52866fSPeter Maydell     qemu_irq irq;
48*1d52866fSPeter Maydell     SSIBus *ssi;
49*1d52866fSPeter Maydell } PL022State;
50*1d52866fSPeter Maydell 
51*1d52866fSPeter Maydell #endif
52