xref: /qemu/include/hw/sd/aspeed_sdhci.h (revision 8063396bf3459a810d24e3efd6110b8480f0de5b)
12bea128cSEddie James /*
22bea128cSEddie James  * Aspeed SD Host Controller
32bea128cSEddie James  * Eddie James <eajames@linux.ibm.com>
42bea128cSEddie James  *
52bea128cSEddie James  * Copyright (C) 2019 IBM Corp
62bea128cSEddie James  * SPDX-License-Identifer: GPL-2.0-or-later
72bea128cSEddie James  */
82bea128cSEddie James 
92bea128cSEddie James #ifndef ASPEED_SDHCI_H
102bea128cSEddie James #define ASPEED_SDHCI_H
112bea128cSEddie James 
122bea128cSEddie James #include "hw/sd/sdhci.h"
13db1015e9SEduardo Habkost #include "qom/object.h"
142bea128cSEddie James 
152bea128cSEddie James #define TYPE_ASPEED_SDHCI "aspeed.sdhci"
16*8063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(AspeedSDHCIState, ASPEED_SDHCI)
172bea128cSEddie James 
182bea128cSEddie James #define ASPEED_SDHCI_CAPABILITIES 0x01E80080
192bea128cSEddie James #define ASPEED_SDHCI_NUM_SLOTS    2
202bea128cSEddie James #define ASPEED_SDHCI_NUM_REGS     (ASPEED_SDHCI_REG_SIZE / sizeof(uint32_t))
212bea128cSEddie James #define ASPEED_SDHCI_REG_SIZE     0x100
222bea128cSEddie James 
23db1015e9SEduardo Habkost struct AspeedSDHCIState {
242bea128cSEddie James     SysBusDevice parent;
252bea128cSEddie James 
262bea128cSEddie James     SDHCIState slots[ASPEED_SDHCI_NUM_SLOTS];
270e2c24c6SAndrew Jeffery     uint8_t num_slots;
282bea128cSEddie James 
292bea128cSEddie James     MemoryRegion iomem;
302bea128cSEddie James     qemu_irq irq;
312bea128cSEddie James 
322bea128cSEddie James     uint32_t regs[ASPEED_SDHCI_NUM_REGS];
33db1015e9SEduardo Habkost };
342bea128cSEddie James 
352bea128cSEddie James #endif /* ASPEED_SDHCI_H */
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