xref: /qemu/include/hw/sd/aspeed_sdhci.h (revision 2bea128c3d0b07d9b33facd24d1703438defa387) 
1*2bea128cSEddie James /*
2*2bea128cSEddie James  * Aspeed SD Host Controller
3*2bea128cSEddie James  * Eddie James <eajames@linux.ibm.com>
4*2bea128cSEddie James  *
5*2bea128cSEddie James  * Copyright (C) 2019 IBM Corp
6*2bea128cSEddie James  * SPDX-License-Identifer: GPL-2.0-or-later
7*2bea128cSEddie James  */
8*2bea128cSEddie James 
9*2bea128cSEddie James #ifndef ASPEED_SDHCI_H
10*2bea128cSEddie James #define ASPEED_SDHCI_H
11*2bea128cSEddie James 
12*2bea128cSEddie James #include "hw/sd/sdhci.h"
13*2bea128cSEddie James 
14*2bea128cSEddie James #define TYPE_ASPEED_SDHCI "aspeed.sdhci"
15*2bea128cSEddie James #define ASPEED_SDHCI(obj) OBJECT_CHECK(AspeedSDHCIState, (obj), \
16*2bea128cSEddie James                                        TYPE_ASPEED_SDHCI)
17*2bea128cSEddie James 
18*2bea128cSEddie James #define ASPEED_SDHCI_CAPABILITIES 0x01E80080
19*2bea128cSEddie James #define ASPEED_SDHCI_NUM_SLOTS    2
20*2bea128cSEddie James #define ASPEED_SDHCI_NUM_REGS     (ASPEED_SDHCI_REG_SIZE / sizeof(uint32_t))
21*2bea128cSEddie James #define ASPEED_SDHCI_REG_SIZE     0x100
22*2bea128cSEddie James 
23*2bea128cSEddie James typedef struct AspeedSDHCIState {
24*2bea128cSEddie James     SysBusDevice parent;
25*2bea128cSEddie James 
26*2bea128cSEddie James     SDHCIState slots[ASPEED_SDHCI_NUM_SLOTS];
27*2bea128cSEddie James 
28*2bea128cSEddie James     MemoryRegion iomem;
29*2bea128cSEddie James     qemu_irq irq;
30*2bea128cSEddie James 
31*2bea128cSEddie James     uint32_t regs[ASPEED_SDHCI_NUM_REGS];
32*2bea128cSEddie James } AspeedSDHCIState;
33*2bea128cSEddie James 
34*2bea128cSEddie James #endif /* ASPEED_SDHCI_H */
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