xref: /qemu/include/hw/s390x/css.h (revision c35fc6aa1840b26f06f9ac79509c7ed9280003ac)
1df1fe5bbSCornelia Huck /*
2df1fe5bbSCornelia Huck  * Channel subsystem structures and definitions.
3df1fe5bbSCornelia Huck  *
4df1fe5bbSCornelia Huck  * Copyright 2012 IBM Corp.
5df1fe5bbSCornelia Huck  * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
6df1fe5bbSCornelia Huck  *
7df1fe5bbSCornelia Huck  * This work is licensed under the terms of the GNU GPL, version 2 or (at
8df1fe5bbSCornelia Huck  * your option) any later version. See the COPYING file in the top-level
9df1fe5bbSCornelia Huck  * directory.
10df1fe5bbSCornelia Huck  */
11df1fe5bbSCornelia Huck 
12df1fe5bbSCornelia Huck #ifndef CSS_H
13df1fe5bbSCornelia Huck #define CSS_H
14df1fe5bbSCornelia Huck 
15a28d8391SYi Min Zhao #include "hw/s390x/adapter.h"
16a28d8391SYi Min Zhao #include "hw/s390x/s390_flic.h"
17bd3f16acSPaolo Bonzini #include "hw/s390x/ioinst.h"
18df1fe5bbSCornelia Huck 
19df1fe5bbSCornelia Huck /* Channel subsystem constants. */
20cf249935SSascha Silbe #define MAX_DEVNO 65535
21df1fe5bbSCornelia Huck #define MAX_SCHID 65535
22df1fe5bbSCornelia Huck #define MAX_SSID 3
23882b3b97SCornelia Huck #define MAX_CSSID 255
24df1fe5bbSCornelia Huck #define MAX_CHPID 255
25df1fe5bbSCornelia Huck 
26df1fe5bbSCornelia Huck #define MAX_CIWS 62
27df1fe5bbSCornelia Huck 
28cf249935SSascha Silbe #define VIRTUAL_CSSID 0xfe
29cf249935SSascha Silbe 
30df1fe5bbSCornelia Huck typedef struct CIW {
31df1fe5bbSCornelia Huck     uint8_t type;
32df1fe5bbSCornelia Huck     uint8_t command;
33df1fe5bbSCornelia Huck     uint16_t count;
34df1fe5bbSCornelia Huck } QEMU_PACKED CIW;
35df1fe5bbSCornelia Huck 
36df1fe5bbSCornelia Huck typedef struct SenseId {
37df1fe5bbSCornelia Huck     /* common part */
38df1fe5bbSCornelia Huck     uint8_t reserved;        /* always 0x'FF' */
39df1fe5bbSCornelia Huck     uint16_t cu_type;        /* control unit type */
40df1fe5bbSCornelia Huck     uint8_t cu_model;        /* control unit model */
41df1fe5bbSCornelia Huck     uint16_t dev_type;       /* device type */
42df1fe5bbSCornelia Huck     uint8_t dev_model;       /* device model */
43df1fe5bbSCornelia Huck     uint8_t unused;          /* padding byte */
44df1fe5bbSCornelia Huck     /* extended part */
45df1fe5bbSCornelia Huck     CIW ciw[MAX_CIWS];       /* variable # of CIWs */
46df1fe5bbSCornelia Huck } QEMU_PACKED SenseId;
47df1fe5bbSCornelia Huck 
48df1fe5bbSCornelia Huck /* Channel measurements, from linux/drivers/s390/cio/cmf.c. */
49df1fe5bbSCornelia Huck typedef struct CMB {
50df1fe5bbSCornelia Huck     uint16_t ssch_rsch_count;
51df1fe5bbSCornelia Huck     uint16_t sample_count;
52df1fe5bbSCornelia Huck     uint32_t device_connect_time;
53df1fe5bbSCornelia Huck     uint32_t function_pending_time;
54df1fe5bbSCornelia Huck     uint32_t device_disconnect_time;
55df1fe5bbSCornelia Huck     uint32_t control_unit_queuing_time;
56df1fe5bbSCornelia Huck     uint32_t device_active_only_time;
57df1fe5bbSCornelia Huck     uint32_t reserved[2];
58df1fe5bbSCornelia Huck } QEMU_PACKED CMB;
59df1fe5bbSCornelia Huck 
60df1fe5bbSCornelia Huck typedef struct CMBE {
61df1fe5bbSCornelia Huck     uint32_t ssch_rsch_count;
62df1fe5bbSCornelia Huck     uint32_t sample_count;
63df1fe5bbSCornelia Huck     uint32_t device_connect_time;
64df1fe5bbSCornelia Huck     uint32_t function_pending_time;
65df1fe5bbSCornelia Huck     uint32_t device_disconnect_time;
66df1fe5bbSCornelia Huck     uint32_t control_unit_queuing_time;
67df1fe5bbSCornelia Huck     uint32_t device_active_only_time;
68df1fe5bbSCornelia Huck     uint32_t device_busy_time;
69df1fe5bbSCornelia Huck     uint32_t initial_command_response_time;
70df1fe5bbSCornelia Huck     uint32_t reserved[7];
71df1fe5bbSCornelia Huck } QEMU_PACKED CMBE;
72df1fe5bbSCornelia Huck 
73bd3f16acSPaolo Bonzini typedef struct SubchDev SubchDev;
74df1fe5bbSCornelia Huck struct SubchDev {
75df1fe5bbSCornelia Huck     /* channel-subsystem related things: */
76df1fe5bbSCornelia Huck     uint8_t cssid;
77df1fe5bbSCornelia Huck     uint8_t ssid;
78df1fe5bbSCornelia Huck     uint16_t schid;
79df1fe5bbSCornelia Huck     uint16_t devno;
80df1fe5bbSCornelia Huck     SCHIB curr_status;
81df1fe5bbSCornelia Huck     uint8_t sense_data[32];
82df1fe5bbSCornelia Huck     hwaddr channel_prog;
83df1fe5bbSCornelia Huck     CCW1 last_cmd;
84df1fe5bbSCornelia Huck     bool last_cmd_valid;
85a327c921SCornelia Huck     bool ccw_fmt_1;
867e749462SCornelia Huck     bool thinint_active;
87e8601dd5SCornelia Huck     uint8_t ccw_no_data_cnt;
88df1fe5bbSCornelia Huck     /* transport-provided data: */
89df1fe5bbSCornelia Huck     int (*ccw_cb) (SubchDev *, CCW1);
9062ac4a52SThomas Huth     void (*disable_cb)(SubchDev *);
91df1fe5bbSCornelia Huck     SenseId id;
92df1fe5bbSCornelia Huck     void *driver_data;
93df1fe5bbSCornelia Huck };
94df1fe5bbSCornelia Huck 
95a28d8391SYi Min Zhao typedef struct IndAddr {
96a28d8391SYi Min Zhao     hwaddr addr;
97a28d8391SYi Min Zhao     uint64_t map;
98a28d8391SYi Min Zhao     unsigned long refcnt;
99a28d8391SYi Min Zhao     int len;
100a28d8391SYi Min Zhao     QTAILQ_ENTRY(IndAddr) sibling;
101a28d8391SYi Min Zhao } IndAddr;
102a28d8391SYi Min Zhao 
103a28d8391SYi Min Zhao IndAddr *get_indicator(hwaddr ind_addr, int len);
104a28d8391SYi Min Zhao void release_indicator(AdapterInfo *adapter, IndAddr *indicator);
105a28d8391SYi Min Zhao int map_indicator(AdapterInfo *adapter, IndAddr *indicator);
106a28d8391SYi Min Zhao 
107df1fe5bbSCornelia Huck typedef SubchDev *(*css_subch_cb_func)(uint8_t m, uint8_t cssid, uint8_t ssid,
108df1fe5bbSCornelia Huck                                        uint16_t schid);
109bcb2b582SJens Freimann void subch_device_save(SubchDev *s, QEMUFile *f);
110bcb2b582SJens Freimann int subch_device_load(SubchDev *s, QEMUFile *f);
111df1fe5bbSCornelia Huck int css_create_css_image(uint8_t cssid, bool default_image);
112df1fe5bbSCornelia Huck bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno);
113df1fe5bbSCornelia Huck void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
114df1fe5bbSCornelia Huck                       uint16_t devno, SubchDev *sch);
115df1fe5bbSCornelia Huck void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type);
116b4436a0bSCornelia Huck uint16_t css_build_subchannel_id(SubchDev *sch);
117df1fe5bbSCornelia Huck void css_reset(void);
118df1fe5bbSCornelia Huck void css_reset_sch(SubchDev *sch);
119df1fe5bbSCornelia Huck void css_queue_crw(uint8_t rsc, uint8_t erc, int chain, uint16_t rsid);
120df1fe5bbSCornelia Huck void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
121df1fe5bbSCornelia Huck                            int hotplugged, int add);
122df1fe5bbSCornelia Huck void css_generate_chp_crws(uint8_t cssid, uint8_t chpid);
1238cba80c3SFrank Blaschka void css_generate_css_crws(uint8_t cssid);
124c81b4f89SSong Shan Gong void css_clear_sei_pending(void);
1257e749462SCornelia Huck void css_adapter_interrupt(uint8_t isc);
12603cf077aSCornelia Huck 
12703cf077aSCornelia Huck #define CSS_IO_ADAPTER_VIRTIO 1
12803cf077aSCornelia Huck int css_register_io_adapter(uint8_t type, uint8_t isc, bool swap,
12903cf077aSCornelia Huck                             bool maskable, uint32_t *id);
130bd3f16acSPaolo Bonzini 
131bd3f16acSPaolo Bonzini #ifndef CONFIG_USER_ONLY
132bd3f16acSPaolo Bonzini SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid,
133bd3f16acSPaolo Bonzini                          uint16_t schid);
134bd3f16acSPaolo Bonzini bool css_subch_visible(SubchDev *sch);
135bd3f16acSPaolo Bonzini void css_conditional_io_interrupt(SubchDev *sch);
136bd3f16acSPaolo Bonzini int css_do_stsch(SubchDev *sch, SCHIB *schib);
137bd3f16acSPaolo Bonzini bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid);
138bd3f16acSPaolo Bonzini int css_do_msch(SubchDev *sch, const SCHIB *schib);
139bd3f16acSPaolo Bonzini int css_do_xsch(SubchDev *sch);
140bd3f16acSPaolo Bonzini int css_do_csch(SubchDev *sch);
141bd3f16acSPaolo Bonzini int css_do_hsch(SubchDev *sch);
142bd3f16acSPaolo Bonzini int css_do_ssch(SubchDev *sch, ORB *orb);
143bd3f16acSPaolo Bonzini int css_do_tsch_get_irb(SubchDev *sch, IRB *irb, int *irb_len);
144bd3f16acSPaolo Bonzini void css_do_tsch_update_subch(SubchDev *sch);
145bd3f16acSPaolo Bonzini int css_do_stcrw(CRW *crw);
146bd3f16acSPaolo Bonzini void css_undo_stcrw(CRW *crw);
147bd3f16acSPaolo Bonzini int css_do_tpi(IOIntCode *int_code, int lowcore);
148bd3f16acSPaolo Bonzini int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
149bd3f16acSPaolo Bonzini                          int rfmt, void *buf);
150bd3f16acSPaolo Bonzini void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo);
151bd3f16acSPaolo Bonzini int css_enable_mcsse(void);
152bd3f16acSPaolo Bonzini int css_enable_mss(void);
153bd3f16acSPaolo Bonzini int css_do_rsch(SubchDev *sch);
154bd3f16acSPaolo Bonzini int css_do_rchp(uint8_t cssid, uint8_t chpid);
155bd3f16acSPaolo Bonzini bool css_present(uint8_t cssid);
156bd3f16acSPaolo Bonzini #endif
15706e686eaSCornelia Huck /*
15806e686eaSCornelia Huck  * Identify a device within the channel subsystem.
15906e686eaSCornelia Huck  * Note that this can be used to identify either the subchannel or
16006e686eaSCornelia Huck  * the attached I/O device, as there's always one I/O device per
16106e686eaSCornelia Huck  * subchannel.
16206e686eaSCornelia Huck  */
16306e686eaSCornelia Huck typedef struct CssDevId {
16406e686eaSCornelia Huck     uint8_t cssid;
16506e686eaSCornelia Huck     uint8_t ssid;
16606e686eaSCornelia Huck     uint16_t devid;
16706e686eaSCornelia Huck     bool valid;
16806e686eaSCornelia Huck } CssDevId;
16906e686eaSCornelia Huck 
17006e686eaSCornelia Huck extern PropertyInfo css_devid_propinfo;
17106e686eaSCornelia Huck 
17206e686eaSCornelia Huck #define DEFINE_PROP_CSS_DEV_ID(_n, _s, _f) \
17306e686eaSCornelia Huck     DEFINE_PROP(_n, _s, _f, css_devid_propinfo, CssDevId)
174bd3f16acSPaolo Bonzini 
175*c35fc6aaSDong Jia Shi extern PropertyInfo css_devid_ro_propinfo;
176*c35fc6aaSDong Jia Shi 
177*c35fc6aaSDong Jia Shi #define DEFINE_PROP_CSS_DEV_ID_RO(_n, _s, _f) \
178*c35fc6aaSDong Jia Shi     DEFINE_PROP(_n, _s, _f, css_devid_ro_propinfo, CssDevId)
179*c35fc6aaSDong Jia Shi 
180cf249935SSascha Silbe /**
181cf249935SSascha Silbe  * Create a subchannel for the given bus id.
182cf249935SSascha Silbe  *
183cf249935SSascha Silbe  * If @p bus_id is valid, verify that it uses the virtual channel
184cf249935SSascha Silbe  * subsystem id and is not already in use, and find a free subchannel
185cf249935SSascha Silbe  * id for it. If @p bus_id is not valid, find a free subchannel id and
186cf249935SSascha Silbe  * device number across all subchannel sets. If either of the former
187cf249935SSascha Silbe  * actions succeed, allocate a subchannel structure, initialise it
188cf249935SSascha Silbe  * with the bus id, subchannel id and device number, register it with
189cf249935SSascha Silbe  * the CSS and return it. Otherwise return NULL.
190cf249935SSascha Silbe  *
191cf249935SSascha Silbe  * The caller becomes owner of the returned subchannel structure and
192cf249935SSascha Silbe  * is responsible for unregistering and freeing it.
193cf249935SSascha Silbe  */
194cf249935SSascha Silbe SubchDev *css_create_virtual_sch(CssDevId bus_id, Error **errp);
195df1fe5bbSCornelia Huck #endif
196