xref: /qemu/include/hw/s390x/css.h (revision 5c8d6f008c0555b54cf10550fa86199a2cfabbca)
1df1fe5bbSCornelia Huck /*
2df1fe5bbSCornelia Huck  * Channel subsystem structures and definitions.
3df1fe5bbSCornelia Huck  *
4df1fe5bbSCornelia Huck  * Copyright 2012 IBM Corp.
5df1fe5bbSCornelia Huck  * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
6df1fe5bbSCornelia Huck  *
7df1fe5bbSCornelia Huck  * This work is licensed under the terms of the GNU GPL, version 2 or (at
8df1fe5bbSCornelia Huck  * your option) any later version. See the COPYING file in the top-level
9df1fe5bbSCornelia Huck  * directory.
10df1fe5bbSCornelia Huck  */
11df1fe5bbSCornelia Huck 
12df1fe5bbSCornelia Huck #ifndef CSS_H
13df1fe5bbSCornelia Huck #define CSS_H
14df1fe5bbSCornelia Huck 
152283f4d6SFei Li #include "cpu.h"
16a28d8391SYi Min Zhao #include "hw/s390x/adapter.h"
17a28d8391SYi Min Zhao #include "hw/s390x/s390_flic.h"
18bd3f16acSPaolo Bonzini #include "hw/s390x/ioinst.h"
19df1fe5bbSCornelia Huck 
20df1fe5bbSCornelia Huck /* Channel subsystem constants. */
21cf249935SSascha Silbe #define MAX_DEVNO 65535
22df1fe5bbSCornelia Huck #define MAX_SCHID 65535
23df1fe5bbSCornelia Huck #define MAX_SSID 3
24882b3b97SCornelia Huck #define MAX_CSSID 255
25df1fe5bbSCornelia Huck #define MAX_CHPID 255
26df1fe5bbSCornelia Huck 
27dde522bbSFei Li #define MAX_ISC 7
28dde522bbSFei Li 
29df1fe5bbSCornelia Huck #define MAX_CIWS 62
30df1fe5bbSCornelia Huck 
31cf249935SSascha Silbe #define VIRTUAL_CSSID 0xfe
326c15e9bfSJing Liu #define VIRTIO_CCW_CHPID 0   /* used by convention */
33cf249935SSascha Silbe 
34df1fe5bbSCornelia Huck typedef struct CIW {
35df1fe5bbSCornelia Huck     uint8_t type;
36df1fe5bbSCornelia Huck     uint8_t command;
37df1fe5bbSCornelia Huck     uint16_t count;
38df1fe5bbSCornelia Huck } QEMU_PACKED CIW;
39df1fe5bbSCornelia Huck 
40df1fe5bbSCornelia Huck typedef struct SenseId {
41df1fe5bbSCornelia Huck     /* common part */
42df1fe5bbSCornelia Huck     uint8_t reserved;        /* always 0x'FF' */
43df1fe5bbSCornelia Huck     uint16_t cu_type;        /* control unit type */
44df1fe5bbSCornelia Huck     uint8_t cu_model;        /* control unit model */
45df1fe5bbSCornelia Huck     uint16_t dev_type;       /* device type */
46df1fe5bbSCornelia Huck     uint8_t dev_model;       /* device model */
47df1fe5bbSCornelia Huck     uint8_t unused;          /* padding byte */
48df1fe5bbSCornelia Huck     /* extended part */
49df1fe5bbSCornelia Huck     CIW ciw[MAX_CIWS];       /* variable # of CIWs */
50df1fe5bbSCornelia Huck } QEMU_PACKED SenseId;
51df1fe5bbSCornelia Huck 
52df1fe5bbSCornelia Huck /* Channel measurements, from linux/drivers/s390/cio/cmf.c. */
53df1fe5bbSCornelia Huck typedef struct CMB {
54df1fe5bbSCornelia Huck     uint16_t ssch_rsch_count;
55df1fe5bbSCornelia Huck     uint16_t sample_count;
56df1fe5bbSCornelia Huck     uint32_t device_connect_time;
57df1fe5bbSCornelia Huck     uint32_t function_pending_time;
58df1fe5bbSCornelia Huck     uint32_t device_disconnect_time;
59df1fe5bbSCornelia Huck     uint32_t control_unit_queuing_time;
60df1fe5bbSCornelia Huck     uint32_t device_active_only_time;
61df1fe5bbSCornelia Huck     uint32_t reserved[2];
62df1fe5bbSCornelia Huck } QEMU_PACKED CMB;
63df1fe5bbSCornelia Huck 
64df1fe5bbSCornelia Huck typedef struct CMBE {
65df1fe5bbSCornelia Huck     uint32_t ssch_rsch_count;
66df1fe5bbSCornelia Huck     uint32_t sample_count;
67df1fe5bbSCornelia Huck     uint32_t device_connect_time;
68df1fe5bbSCornelia Huck     uint32_t function_pending_time;
69df1fe5bbSCornelia Huck     uint32_t device_disconnect_time;
70df1fe5bbSCornelia Huck     uint32_t control_unit_queuing_time;
71df1fe5bbSCornelia Huck     uint32_t device_active_only_time;
72df1fe5bbSCornelia Huck     uint32_t device_busy_time;
73df1fe5bbSCornelia Huck     uint32_t initial_command_response_time;
74df1fe5bbSCornelia Huck     uint32_t reserved[7];
75df1fe5bbSCornelia Huck } QEMU_PACKED CMBE;
76df1fe5bbSCornelia Huck 
77bd3f16acSPaolo Bonzini typedef struct SubchDev SubchDev;
78df1fe5bbSCornelia Huck struct SubchDev {
79df1fe5bbSCornelia Huck     /* channel-subsystem related things: */
80df1fe5bbSCornelia Huck     uint8_t cssid;
81df1fe5bbSCornelia Huck     uint8_t ssid;
82df1fe5bbSCornelia Huck     uint16_t schid;
83df1fe5bbSCornelia Huck     uint16_t devno;
84df1fe5bbSCornelia Huck     SCHIB curr_status;
85df1fe5bbSCornelia Huck     uint8_t sense_data[32];
86df1fe5bbSCornelia Huck     hwaddr channel_prog;
87df1fe5bbSCornelia Huck     CCW1 last_cmd;
88df1fe5bbSCornelia Huck     bool last_cmd_valid;
89a327c921SCornelia Huck     bool ccw_fmt_1;
907e749462SCornelia Huck     bool thinint_active;
91e8601dd5SCornelia Huck     uint8_t ccw_no_data_cnt;
92517ff12cSHalil Pasic     uint16_t migrated_schid; /* used for missmatch detection */
93ff443fe6SHalil Pasic     ORB orb;
94df1fe5bbSCornelia Huck     /* transport-provided data: */
95df1fe5bbSCornelia Huck     int (*ccw_cb) (SubchDev *, CCW1);
9662ac4a52SThomas Huth     void (*disable_cb)(SubchDev *);
97b5f5a3afSHalil Pasic     int (*do_subchannel_work) (SubchDev *);
98df1fe5bbSCornelia Huck     SenseId id;
99df1fe5bbSCornelia Huck     void *driver_data;
100df1fe5bbSCornelia Huck };
101df1fe5bbSCornelia Huck 
102517ff12cSHalil Pasic extern const VMStateDescription vmstate_subch_dev;
103517ff12cSHalil Pasic 
1048f3cf012SXiao Feng Ren /*
1058f3cf012SXiao Feng Ren  * Identify a device within the channel subsystem.
1068f3cf012SXiao Feng Ren  * Note that this can be used to identify either the subchannel or
1078f3cf012SXiao Feng Ren  * the attached I/O device, as there's always one I/O device per
1088f3cf012SXiao Feng Ren  * subchannel.
1098f3cf012SXiao Feng Ren  */
1108f3cf012SXiao Feng Ren typedef struct CssDevId {
1118f3cf012SXiao Feng Ren     uint8_t cssid;
1128f3cf012SXiao Feng Ren     uint8_t ssid;
1138f3cf012SXiao Feng Ren     uint16_t devid;
1148f3cf012SXiao Feng Ren     bool valid;
1158f3cf012SXiao Feng Ren } CssDevId;
1168f3cf012SXiao Feng Ren 
1171b6b7d10SFam Zheng extern const PropertyInfo css_devid_propinfo;
1188f3cf012SXiao Feng Ren 
1198f3cf012SXiao Feng Ren #define DEFINE_PROP_CSS_DEV_ID(_n, _s, _f) \
1208f3cf012SXiao Feng Ren     DEFINE_PROP(_n, _s, _f, css_devid_propinfo, CssDevId)
1218f3cf012SXiao Feng Ren 
122a28d8391SYi Min Zhao typedef struct IndAddr {
123a28d8391SYi Min Zhao     hwaddr addr;
124a28d8391SYi Min Zhao     uint64_t map;
125a28d8391SYi Min Zhao     unsigned long refcnt;
126517ff12cSHalil Pasic     int32_t len;
127a28d8391SYi Min Zhao     QTAILQ_ENTRY(IndAddr) sibling;
128a28d8391SYi Min Zhao } IndAddr;
129a28d8391SYi Min Zhao 
130517ff12cSHalil Pasic extern const VMStateDescription vmstate_ind_addr;
131517ff12cSHalil Pasic 
132517ff12cSHalil Pasic #define VMSTATE_PTR_TO_IND_ADDR(_f, _s)                                   \
133517ff12cSHalil Pasic     VMSTATE_STRUCT(_f, _s, 1, vmstate_ind_addr, IndAddr*)
134517ff12cSHalil Pasic 
135a28d8391SYi Min Zhao IndAddr *get_indicator(hwaddr ind_addr, int len);
136a28d8391SYi Min Zhao void release_indicator(AdapterInfo *adapter, IndAddr *indicator);
137a28d8391SYi Min Zhao int map_indicator(AdapterInfo *adapter, IndAddr *indicator);
138a28d8391SYi Min Zhao 
139df1fe5bbSCornelia Huck typedef SubchDev *(*css_subch_cb_func)(uint8_t m, uint8_t cssid, uint8_t ssid,
140df1fe5bbSCornelia Huck                                        uint16_t schid);
141df1fe5bbSCornelia Huck int css_create_css_image(uint8_t cssid, bool default_image);
142df1fe5bbSCornelia Huck bool css_devno_used(uint8_t cssid, uint8_t ssid, uint16_t devno);
143df1fe5bbSCornelia Huck void css_subch_assign(uint8_t cssid, uint8_t ssid, uint16_t schid,
144df1fe5bbSCornelia Huck                       uint16_t devno, SubchDev *sch);
145df1fe5bbSCornelia Huck void css_sch_build_virtual_schib(SubchDev *sch, uint8_t chpid, uint8_t type);
1468f3cf012SXiao Feng Ren int css_sch_build_schib(SubchDev *sch, CssDevId *dev_id);
1476c15e9bfSJing Liu unsigned int css_find_free_chpid(uint8_t cssid);
148b4436a0bSCornelia Huck uint16_t css_build_subchannel_id(SubchDev *sch);
1498ca2b376SXiao Feng Ren void copy_scsw_to_guest(SCSW *dest, const SCSW *src);
1508ca2b376SXiao Feng Ren void css_inject_io_interrupt(SubchDev *sch);
151df1fe5bbSCornelia Huck void css_reset(void);
152df1fe5bbSCornelia Huck void css_reset_sch(SubchDev *sch);
153*5c8d6f00SDong Jia Shi void css_queue_crw(uint8_t rsc, uint8_t erc, int solicited,
154*5c8d6f00SDong Jia Shi                    int chain, uint16_t rsid);
155df1fe5bbSCornelia Huck void css_generate_sch_crws(uint8_t cssid, uint8_t ssid, uint16_t schid,
156df1fe5bbSCornelia Huck                            int hotplugged, int add);
157df1fe5bbSCornelia Huck void css_generate_chp_crws(uint8_t cssid, uint8_t chpid);
1588cba80c3SFrank Blaschka void css_generate_css_crws(uint8_t cssid);
159c81b4f89SSong Shan Gong void css_clear_sei_pending(void);
160bab482d7SXiao Feng Ren int s390_ccw_cmd_request(ORB *orb, SCSW *scsw, void *data);
161b5f5a3afSHalil Pasic int do_subchannel_work_virtual(SubchDev *sub);
162b5f5a3afSHalil Pasic int do_subchannel_work_passthrough(SubchDev *sub);
16303cf077aSCornelia Huck 
1645b00bef2SFei Li typedef enum {
1655b00bef2SFei Li     CSS_IO_ADAPTER_VIRTIO = 0,
1665b00bef2SFei Li     CSS_IO_ADAPTER_PCI = 1,
1675b00bef2SFei Li     CSS_IO_ADAPTER_TYPE_NUMS,
1685b00bef2SFei Li } CssIoAdapterType;
1695b00bef2SFei Li 
17025a08b8dSYi Min Zhao void css_adapter_interrupt(CssIoAdapterType type, uint8_t isc);
1712283f4d6SFei Li int css_do_sic(CPUS390XState *env, uint8_t isc, uint16_t mode);
172dde522bbSFei Li uint32_t css_get_adapter_id(CssIoAdapterType type, uint8_t isc);
173dde522bbSFei Li void css_register_io_adapters(CssIoAdapterType type, bool swap, bool maskable,
1741497c160SFei Li                               uint8_t flags, Error **errp);
1751497c160SFei Li 
1761497c160SFei Li #ifndef CONFIG_KVM
1771497c160SFei Li #define S390_ADAPTER_SUPPRESSIBLE 0x01
1781497c160SFei Li #else
1791497c160SFei Li #define S390_ADAPTER_SUPPRESSIBLE KVM_S390_ADAPTER_SUPPRESSIBLE
1801497c160SFei Li #endif
181bd3f16acSPaolo Bonzini 
182bd3f16acSPaolo Bonzini #ifndef CONFIG_USER_ONLY
183bd3f16acSPaolo Bonzini SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid,
184bd3f16acSPaolo Bonzini                          uint16_t schid);
185bd3f16acSPaolo Bonzini bool css_subch_visible(SubchDev *sch);
186bd3f16acSPaolo Bonzini void css_conditional_io_interrupt(SubchDev *sch);
187bd3f16acSPaolo Bonzini int css_do_stsch(SubchDev *sch, SCHIB *schib);
188bd3f16acSPaolo Bonzini bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid);
189bd3f16acSPaolo Bonzini int css_do_msch(SubchDev *sch, const SCHIB *schib);
190bd3f16acSPaolo Bonzini int css_do_xsch(SubchDev *sch);
191bd3f16acSPaolo Bonzini int css_do_csch(SubchDev *sch);
192bd3f16acSPaolo Bonzini int css_do_hsch(SubchDev *sch);
193bd3f16acSPaolo Bonzini int css_do_ssch(SubchDev *sch, ORB *orb);
194bd3f16acSPaolo Bonzini int css_do_tsch_get_irb(SubchDev *sch, IRB *irb, int *irb_len);
195bd3f16acSPaolo Bonzini void css_do_tsch_update_subch(SubchDev *sch);
196bd3f16acSPaolo Bonzini int css_do_stcrw(CRW *crw);
197bd3f16acSPaolo Bonzini void css_undo_stcrw(CRW *crw);
198bd3f16acSPaolo Bonzini int css_do_tpi(IOIntCode *int_code, int lowcore);
199bd3f16acSPaolo Bonzini int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid,
200bd3f16acSPaolo Bonzini                          int rfmt, void *buf);
201bd3f16acSPaolo Bonzini void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo);
202bd3f16acSPaolo Bonzini int css_enable_mcsse(void);
203bd3f16acSPaolo Bonzini int css_enable_mss(void);
204bd3f16acSPaolo Bonzini int css_do_rsch(SubchDev *sch);
205bd3f16acSPaolo Bonzini int css_do_rchp(uint8_t cssid, uint8_t chpid);
206bd3f16acSPaolo Bonzini bool css_present(uint8_t cssid);
207bd3f16acSPaolo Bonzini #endif
208bd3f16acSPaolo Bonzini 
2091b6b7d10SFam Zheng extern const PropertyInfo css_devid_ro_propinfo;
210c35fc6aaSDong Jia Shi 
211c35fc6aaSDong Jia Shi #define DEFINE_PROP_CSS_DEV_ID_RO(_n, _s, _f) \
212c35fc6aaSDong Jia Shi     DEFINE_PROP(_n, _s, _f, css_devid_ro_propinfo, CssDevId)
213c35fc6aaSDong Jia Shi 
214cf249935SSascha Silbe /**
215cf249935SSascha Silbe  * Create a subchannel for the given bus id.
216cf249935SSascha Silbe  *
217817d4a6bSDong Jia Shi  * If @p bus_id is valid, and @p squash_mcss is true, verify that it is
218817d4a6bSDong Jia Shi  * not already in use in the default css, and find a free devno from the
219817d4a6bSDong Jia Shi  * default css image for it.
220817d4a6bSDong Jia Shi  * If @p bus_id is valid, and @p squash_mcss is false, verify that it is
221817d4a6bSDong Jia Shi  * not already in use, and find a free devno for it.
222817d4a6bSDong Jia Shi  * If @p bus_id is not valid, and if either @p squash_mcss or @p is_virtual
223817d4a6bSDong Jia Shi  * is true, find a free subchannel id and device number across all
224817d4a6bSDong Jia Shi  * subchannel sets from the default css image.
225817d4a6bSDong Jia Shi  * If @p bus_id is not valid, and if both @p squash_mcss and @p is_virtual
226817d4a6bSDong Jia Shi  * are false, find a non-full css image and find a free subchannel id and
227817d4a6bSDong Jia Shi  * device number across all subchannel sets from it.
228817d4a6bSDong Jia Shi  *
229817d4a6bSDong Jia Shi  * If either of the former actions succeed, allocate a subchannel structure,
230817d4a6bSDong Jia Shi  * initialise it with the bus id, subchannel id and device number, register
231817d4a6bSDong Jia Shi  * it with the CSS and return it. Otherwise return NULL.
232cf249935SSascha Silbe  *
233cf249935SSascha Silbe  * The caller becomes owner of the returned subchannel structure and
234cf249935SSascha Silbe  * is responsible for unregistering and freeing it.
235cf249935SSascha Silbe  */
236817d4a6bSDong Jia Shi SubchDev *css_create_sch(CssDevId bus_id, bool is_virtual, bool squash_mcss,
237817d4a6bSDong Jia Shi                          Error **errp);
238e996583eSHalil Pasic 
239e996583eSHalil Pasic /** Turn on css migration */
240e996583eSHalil Pasic void css_register_vmstate(void);
241e996583eSHalil Pasic 
242df1fe5bbSCornelia Huck #endif
243