1fe0fe473SAlistair Francis /* 2fe0fe473SAlistair Francis * QEMU RISC-V Board Compatible with OpenTitan FPGA platform 3fe0fe473SAlistair Francis * 4fe0fe473SAlistair Francis * Copyright (c) 2020 Western Digital 5fe0fe473SAlistair Francis * 6fe0fe473SAlistair Francis * This program is free software; you can redistribute it and/or modify it 7fe0fe473SAlistair Francis * under the terms and conditions of the GNU General Public License, 8fe0fe473SAlistair Francis * version 2 or later, as published by the Free Software Foundation. 9fe0fe473SAlistair Francis * 10fe0fe473SAlistair Francis * This program is distributed in the hope it will be useful, but WITHOUT 11fe0fe473SAlistair Francis * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12fe0fe473SAlistair Francis * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13fe0fe473SAlistair Francis * more details. 14fe0fe473SAlistair Francis * 15fe0fe473SAlistair Francis * You should have received a copy of the GNU General Public License along with 16fe0fe473SAlistair Francis * this program. If not, see <http://www.gnu.org/licenses/>. 17fe0fe473SAlistair Francis */ 18fe0fe473SAlistair Francis 19fe0fe473SAlistair Francis #ifndef HW_OPENTITAN_H 20fe0fe473SAlistair Francis #define HW_OPENTITAN_H 21fe0fe473SAlistair Francis 22fe0fe473SAlistair Francis #include "hw/riscv/riscv_hart.h" 23*ef631006SAlistair Francis #include "hw/intc/sifive_plic.h" 24cc411260SAlistair Francis #include "hw/char/ibex_uart.h" 253ef64344SAlistair Francis #include "hw/timer/ibex_timer.h" 26db1015e9SEduardo Habkost #include "qom/object.h" 27fe0fe473SAlistair Francis 28fe0fe473SAlistair Francis #define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc" 298063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(LowRISCIbexSoCState, RISCV_IBEX_SOC) 30fe0fe473SAlistair Francis 31db1015e9SEduardo Habkost struct LowRISCIbexSoCState { 32fe0fe473SAlistair Francis /*< private >*/ 33fe0fe473SAlistair Francis SysBusDevice parent_obj; 34fe0fe473SAlistair Francis 35fe0fe473SAlistair Francis /*< public >*/ 36fe0fe473SAlistair Francis RISCVHartArrayState cpus; 37*ef631006SAlistair Francis SiFivePLICState plic; 38cc411260SAlistair Francis IbexUartState uart; 393ef64344SAlistair Francis IbexTimerState timer; 40b9fc5135SAlistair Francis 41fe0fe473SAlistair Francis MemoryRegion flash_mem; 42fe0fe473SAlistair Francis MemoryRegion rom; 43bb7e0cdeSAlistair Francis MemoryRegion flash_alias; 44db1015e9SEduardo Habkost }; 45fe0fe473SAlistair Francis 46fe0fe473SAlistair Francis typedef struct OpenTitanState { 47fe0fe473SAlistair Francis /*< private >*/ 48fe0fe473SAlistair Francis SysBusDevice parent_obj; 49fe0fe473SAlistair Francis 50fe0fe473SAlistair Francis /*< public >*/ 51fe0fe473SAlistair Francis LowRISCIbexSoCState soc; 52fe0fe473SAlistair Francis } OpenTitanState; 53fe0fe473SAlistair Francis 54fe0fe473SAlistair Francis enum { 5530c717cbSEduardo Habkost IBEX_DEV_ROM, 5630c717cbSEduardo Habkost IBEX_DEV_RAM, 5730c717cbSEduardo Habkost IBEX_DEV_FLASH, 58bb7e0cdeSAlistair Francis IBEX_DEV_FLASH_VIRTUAL, 5930c717cbSEduardo Habkost IBEX_DEV_UART, 6030c717cbSEduardo Habkost IBEX_DEV_GPIO, 6130c717cbSEduardo Habkost IBEX_DEV_SPI, 62d31e970aSAlistair Francis IBEX_DEV_I2C, 63d31e970aSAlistair Francis IBEX_DEV_PATTGEN, 643ef64344SAlistair Francis IBEX_DEV_TIMER, 65d31e970aSAlistair Francis IBEX_DEV_SENSOR_CTRL, 66d31e970aSAlistair Francis IBEX_DEV_OTP_CTRL, 6730c717cbSEduardo Habkost IBEX_DEV_PWRMGR, 6830c717cbSEduardo Habkost IBEX_DEV_RSTMGR, 6930c717cbSEduardo Habkost IBEX_DEV_CLKMGR, 7030c717cbSEduardo Habkost IBEX_DEV_PINMUX, 71d31e970aSAlistair Francis IBEX_DEV_PADCTRL, 72d31e970aSAlistair Francis IBEX_DEV_USBDEV, 73d31e970aSAlistair Francis IBEX_DEV_FLASH_CTRL, 74d31e970aSAlistair Francis IBEX_DEV_PLIC, 75d31e970aSAlistair Francis IBEX_DEV_AES, 76d31e970aSAlistair Francis IBEX_DEV_HMAC, 77d31e970aSAlistair Francis IBEX_DEV_KMAC, 78d31e970aSAlistair Francis IBEX_DEV_KEYMGR, 79d31e970aSAlistair Francis IBEX_DEV_CSRNG, 80d31e970aSAlistair Francis IBEX_DEV_ENTROPY, 81d31e970aSAlistair Francis IBEX_DEV_EDNO, 82d31e970aSAlistair Francis IBEX_DEV_EDN1, 8330c717cbSEduardo Habkost IBEX_DEV_ALERT_HANDLER, 8430c717cbSEduardo Habkost IBEX_DEV_NMI_GEN, 85d31e970aSAlistair Francis IBEX_DEV_OTBN, 865ee25764SAlistair Francis IBEX_DEV_PERI, 87fe0fe473SAlistair Francis }; 88fe0fe473SAlistair Francis 89cc411260SAlistair Francis enum { 90*ef631006SAlistair Francis IBEX_TIMER_TIMEREXPIRED0_0 = 126, 91d4cad544SAlistair Francis IBEX_UART0_RX_PARITY_ERR_IRQ = 8, 92d4cad544SAlistair Francis IBEX_UART0_RX_TIMEOUT_IRQ = 7, 93d4cad544SAlistair Francis IBEX_UART0_RX_BREAK_ERR_IRQ = 6, 94d4cad544SAlistair Francis IBEX_UART0_RX_FRAME_ERR_IRQ = 5, 95d4cad544SAlistair Francis IBEX_UART0_RX_OVERFLOW_IRQ = 4, 96d4cad544SAlistair Francis IBEX_UART0_TX_EMPTY_IRQ = 3, 97d4cad544SAlistair Francis IBEX_UART0_RX_WATERMARK_IRQ = 2, 98d4cad544SAlistair Francis IBEX_UART0_TX_WATERMARK_IRQ = 1, 99cc411260SAlistair Francis }; 100cc411260SAlistair Francis 101fe0fe473SAlistair Francis #endif 102