1fe0fe473SAlistair Francis /* 2fe0fe473SAlistair Francis * QEMU RISC-V Board Compatible with OpenTitan FPGA platform 3fe0fe473SAlistair Francis * 4fe0fe473SAlistair Francis * Copyright (c) 2020 Western Digital 5fe0fe473SAlistair Francis * 6fe0fe473SAlistair Francis * This program is free software; you can redistribute it and/or modify it 7fe0fe473SAlistair Francis * under the terms and conditions of the GNU General Public License, 8fe0fe473SAlistair Francis * version 2 or later, as published by the Free Software Foundation. 9fe0fe473SAlistair Francis * 10fe0fe473SAlistair Francis * This program is distributed in the hope it will be useful, but WITHOUT 11fe0fe473SAlistair Francis * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12fe0fe473SAlistair Francis * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13fe0fe473SAlistair Francis * more details. 14fe0fe473SAlistair Francis * 15fe0fe473SAlistair Francis * You should have received a copy of the GNU General Public License along with 16fe0fe473SAlistair Francis * this program. If not, see <http://www.gnu.org/licenses/>. 17fe0fe473SAlistair Francis */ 18fe0fe473SAlistair Francis 19fe0fe473SAlistair Francis #ifndef HW_OPENTITAN_H 20fe0fe473SAlistair Francis #define HW_OPENTITAN_H 21fe0fe473SAlistair Francis 22fe0fe473SAlistair Francis #include "hw/riscv/riscv_hart.h" 23*b9fc5135SAlistair Francis #include "hw/intc/ibex_plic.h" 24fe0fe473SAlistair Francis 25fe0fe473SAlistair Francis #define TYPE_RISCV_IBEX_SOC "riscv.lowrisc.ibex.soc" 26fe0fe473SAlistair Francis #define RISCV_IBEX_SOC(obj) \ 27fe0fe473SAlistair Francis OBJECT_CHECK(LowRISCIbexSoCState, (obj), TYPE_RISCV_IBEX_SOC) 28fe0fe473SAlistair Francis 29fe0fe473SAlistair Francis typedef struct LowRISCIbexSoCState { 30fe0fe473SAlistair Francis /*< private >*/ 31fe0fe473SAlistair Francis SysBusDevice parent_obj; 32fe0fe473SAlistair Francis 33fe0fe473SAlistair Francis /*< public >*/ 34fe0fe473SAlistair Francis RISCVHartArrayState cpus; 35*b9fc5135SAlistair Francis IbexPlicState plic; 36*b9fc5135SAlistair Francis 37fe0fe473SAlistair Francis MemoryRegion flash_mem; 38fe0fe473SAlistair Francis MemoryRegion rom; 39fe0fe473SAlistair Francis } LowRISCIbexSoCState; 40fe0fe473SAlistair Francis 41fe0fe473SAlistair Francis typedef struct OpenTitanState { 42fe0fe473SAlistair Francis /*< private >*/ 43fe0fe473SAlistair Francis SysBusDevice parent_obj; 44fe0fe473SAlistair Francis 45fe0fe473SAlistair Francis /*< public >*/ 46fe0fe473SAlistair Francis LowRISCIbexSoCState soc; 47fe0fe473SAlistair Francis } OpenTitanState; 48fe0fe473SAlistair Francis 49fe0fe473SAlistair Francis enum { 50fe0fe473SAlistair Francis IBEX_ROM, 51fe0fe473SAlistair Francis IBEX_RAM, 52fe0fe473SAlistair Francis IBEX_FLASH, 53fe0fe473SAlistair Francis IBEX_UART, 54fe0fe473SAlistair Francis IBEX_GPIO, 55fe0fe473SAlistair Francis IBEX_SPI, 56fe0fe473SAlistair Francis IBEX_FLASH_CTRL, 57fe0fe473SAlistair Francis IBEX_RV_TIMER, 58fe0fe473SAlistair Francis IBEX_AES, 59fe0fe473SAlistair Francis IBEX_HMAC, 60fe0fe473SAlistair Francis IBEX_PLIC, 61fe0fe473SAlistair Francis IBEX_PWRMGR, 62fe0fe473SAlistair Francis IBEX_RSTMGR, 63fe0fe473SAlistair Francis IBEX_CLKMGR, 64fe0fe473SAlistair Francis IBEX_PINMUX, 65fe0fe473SAlistair Francis IBEX_ALERT_HANDLER, 66fe0fe473SAlistair Francis IBEX_NMI_GEN, 67fe0fe473SAlistair Francis IBEX_USBDEV, 68fe0fe473SAlistair Francis IBEX_PADCTRL, 69fe0fe473SAlistair Francis }; 70fe0fe473SAlistair Francis 71fe0fe473SAlistair Francis #endif 72