1*83fcaefdSAnup Patel /* 2*83fcaefdSAnup Patel * QEMU RISC-V NUMA Helper 3*83fcaefdSAnup Patel * 4*83fcaefdSAnup Patel * Copyright (c) 2020 Western Digital Corporation or its affiliates. 5*83fcaefdSAnup Patel * 6*83fcaefdSAnup Patel * This program is free software; you can redistribute it and/or modify it 7*83fcaefdSAnup Patel * under the terms and conditions of the GNU General Public License, 8*83fcaefdSAnup Patel * version 2 or later, as published by the Free Software Foundation. 9*83fcaefdSAnup Patel * 10*83fcaefdSAnup Patel * This program is distributed in the hope it will be useful, but WITHOUT 11*83fcaefdSAnup Patel * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12*83fcaefdSAnup Patel * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13*83fcaefdSAnup Patel * more details. 14*83fcaefdSAnup Patel * 15*83fcaefdSAnup Patel * You should have received a copy of the GNU General Public License along with 16*83fcaefdSAnup Patel * this program. If not, see <http://www.gnu.org/licenses/>. 17*83fcaefdSAnup Patel */ 18*83fcaefdSAnup Patel 19*83fcaefdSAnup Patel #ifndef RISCV_NUMA_H 20*83fcaefdSAnup Patel #define RISCV_NUMA_H 21*83fcaefdSAnup Patel 22*83fcaefdSAnup Patel #include "hw/sysbus.h" 23*83fcaefdSAnup Patel #include "sysemu/numa.h" 24*83fcaefdSAnup Patel 25*83fcaefdSAnup Patel /** 26*83fcaefdSAnup Patel * riscv_socket_count: 27*83fcaefdSAnup Patel * @ms: pointer to machine state 28*83fcaefdSAnup Patel * 29*83fcaefdSAnup Patel * Returns: number of sockets for a numa system and 1 for a non-numa system 30*83fcaefdSAnup Patel */ 31*83fcaefdSAnup Patel int riscv_socket_count(const MachineState *ms); 32*83fcaefdSAnup Patel 33*83fcaefdSAnup Patel /** 34*83fcaefdSAnup Patel * riscv_socket_first_hartid: 35*83fcaefdSAnup Patel * @ms: pointer to machine state 36*83fcaefdSAnup Patel * @socket_id: socket index 37*83fcaefdSAnup Patel * 38*83fcaefdSAnup Patel * Returns: first hartid for a valid socket and -1 for an invalid socket 39*83fcaefdSAnup Patel */ 40*83fcaefdSAnup Patel int riscv_socket_first_hartid(const MachineState *ms, int socket_id); 41*83fcaefdSAnup Patel 42*83fcaefdSAnup Patel /** 43*83fcaefdSAnup Patel * riscv_socket_last_hartid: 44*83fcaefdSAnup Patel * @ms: pointer to machine state 45*83fcaefdSAnup Patel * @socket_id: socket index 46*83fcaefdSAnup Patel * 47*83fcaefdSAnup Patel * Returns: last hartid for a valid socket and -1 for an invalid socket 48*83fcaefdSAnup Patel */ 49*83fcaefdSAnup Patel int riscv_socket_last_hartid(const MachineState *ms, int socket_id); 50*83fcaefdSAnup Patel 51*83fcaefdSAnup Patel /** 52*83fcaefdSAnup Patel * riscv_socket_hart_count: 53*83fcaefdSAnup Patel * @ms: pointer to machine state 54*83fcaefdSAnup Patel * @socket_id: socket index 55*83fcaefdSAnup Patel * 56*83fcaefdSAnup Patel * Returns: number of harts for a valid socket and -1 for an invalid socket 57*83fcaefdSAnup Patel */ 58*83fcaefdSAnup Patel int riscv_socket_hart_count(const MachineState *ms, int socket_id); 59*83fcaefdSAnup Patel 60*83fcaefdSAnup Patel /** 61*83fcaefdSAnup Patel * riscv_socket_mem_offset: 62*83fcaefdSAnup Patel * @ms: pointer to machine state 63*83fcaefdSAnup Patel * @socket_id: socket index 64*83fcaefdSAnup Patel * 65*83fcaefdSAnup Patel * Returns: offset of ram belonging to given socket 66*83fcaefdSAnup Patel */ 67*83fcaefdSAnup Patel uint64_t riscv_socket_mem_offset(const MachineState *ms, int socket_id); 68*83fcaefdSAnup Patel 69*83fcaefdSAnup Patel /** 70*83fcaefdSAnup Patel * riscv_socket_mem_size: 71*83fcaefdSAnup Patel * @ms: pointer to machine state 72*83fcaefdSAnup Patel * @socket_id: socket index 73*83fcaefdSAnup Patel * 74*83fcaefdSAnup Patel * Returns: size of ram belonging to given socket 75*83fcaefdSAnup Patel */ 76*83fcaefdSAnup Patel uint64_t riscv_socket_mem_size(const MachineState *ms, int socket_id); 77*83fcaefdSAnup Patel 78*83fcaefdSAnup Patel /** 79*83fcaefdSAnup Patel * riscv_socket_check_hartids: 80*83fcaefdSAnup Patel * @ms: pointer to machine state 81*83fcaefdSAnup Patel * @socket_id: socket index 82*83fcaefdSAnup Patel * 83*83fcaefdSAnup Patel * Returns: true if hardids belonging to given socket are contiguous else false 84*83fcaefdSAnup Patel */ 85*83fcaefdSAnup Patel bool riscv_socket_check_hartids(const MachineState *ms, int socket_id); 86*83fcaefdSAnup Patel 87*83fcaefdSAnup Patel /** 88*83fcaefdSAnup Patel * riscv_socket_fdt_write_id: 89*83fcaefdSAnup Patel * @ms: pointer to machine state 90*83fcaefdSAnup Patel * @socket_id: socket index 91*83fcaefdSAnup Patel * 92*83fcaefdSAnup Patel * Write NUMA node-id FDT property for given FDT node 93*83fcaefdSAnup Patel */ 94*83fcaefdSAnup Patel void riscv_socket_fdt_write_id(const MachineState *ms, void *fdt, 95*83fcaefdSAnup Patel const char *node_name, int socket_id); 96*83fcaefdSAnup Patel 97*83fcaefdSAnup Patel /** 98*83fcaefdSAnup Patel * riscv_socket_fdt_write_distance_matrix: 99*83fcaefdSAnup Patel * @ms: pointer to machine state 100*83fcaefdSAnup Patel * @socket_id: socket index 101*83fcaefdSAnup Patel * 102*83fcaefdSAnup Patel * Write NUMA distance matrix in FDT for given machine 103*83fcaefdSAnup Patel */ 104*83fcaefdSAnup Patel void riscv_socket_fdt_write_distance_matrix(const MachineState *ms, void *fdt); 105*83fcaefdSAnup Patel 106*83fcaefdSAnup Patel CpuInstanceProperties 107*83fcaefdSAnup Patel riscv_numa_cpu_index_to_props(MachineState *ms, unsigned cpu_index); 108*83fcaefdSAnup Patel 109*83fcaefdSAnup Patel int64_t riscv_numa_get_default_cpu_node_id(const MachineState *ms, int idx); 110*83fcaefdSAnup Patel 111*83fcaefdSAnup Patel const CPUArchIdList *riscv_numa_possible_cpu_arch_ids(MachineState *ms); 112*83fcaefdSAnup Patel 113*83fcaefdSAnup Patel #endif /* RISCV_NUMA_H */ 114