1 /* 2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator 3 * 4 * PAPR Virtualized Interrupt System, aka ICS/ICP aka xics 5 * 6 * Copyright (c) 2010,2011 David Gibson, IBM Corporation. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 * 26 */ 27 28 #ifndef XICS_H 29 #define XICS_H 30 31 #include "hw/qdev.h" 32 33 #define XICS_IPI 0x2 34 #define XICS_BUID 0x1 35 #define XICS_IRQ_BASE (XICS_BUID << 12) 36 37 /* 38 * We currently only support one BUID which is our interrupt base 39 * (the kernel implementation supports more but we don't exploit 40 * that yet) 41 */ 42 typedef struct ICPStateClass ICPStateClass; 43 typedef struct ICPState ICPState; 44 typedef struct PnvICPState PnvICPState; 45 typedef struct ICSStateClass ICSStateClass; 46 typedef struct ICSState ICSState; 47 typedef struct ICSIRQState ICSIRQState; 48 typedef struct XICSFabric XICSFabric; 49 50 #define TYPE_ICP "icp" 51 #define ICP(obj) OBJECT_CHECK(ICPState, (obj), TYPE_ICP) 52 53 #define TYPE_KVM_ICP "icp-kvm" 54 #define KVM_ICP(obj) OBJECT_CHECK(ICPState, (obj), TYPE_KVM_ICP) 55 56 #define TYPE_PNV_ICP "pnv-icp" 57 #define PNV_ICP(obj) OBJECT_CHECK(PnvICPState, (obj), TYPE_PNV_ICP) 58 59 #define ICP_CLASS(klass) \ 60 OBJECT_CLASS_CHECK(ICPStateClass, (klass), TYPE_ICP) 61 #define ICP_GET_CLASS(obj) \ 62 OBJECT_GET_CLASS(ICPStateClass, (obj), TYPE_ICP) 63 64 struct ICPStateClass { 65 DeviceClass parent_class; 66 67 DeviceRealize parent_realize; 68 }; 69 70 struct ICPState { 71 /*< private >*/ 72 DeviceState parent_obj; 73 /*< public >*/ 74 CPUState *cs; 75 ICSState *xirr_owner; 76 uint32_t xirr; 77 uint8_t pending_priority; 78 uint8_t mfrr; 79 qemu_irq output; 80 81 XICSFabric *xics; 82 }; 83 84 #define ICP_PROP_XICS "xics" 85 #define ICP_PROP_CPU "cpu" 86 87 struct PnvICPState { 88 ICPState parent_obj; 89 90 MemoryRegion mmio; 91 uint32_t links[3]; 92 }; 93 94 #define TYPE_ICS_BASE "ics-base" 95 #define ICS_BASE(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_BASE) 96 97 /* Retain ics for sPAPR for migration from existing sPAPR guests */ 98 #define TYPE_ICS_SIMPLE "ics" 99 #define ICS_SIMPLE(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SIMPLE) 100 101 #define TYPE_ICS_KVM "icskvm" 102 #define ICS_KVM(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_KVM) 103 104 #define ICS_BASE_CLASS(klass) \ 105 OBJECT_CLASS_CHECK(ICSStateClass, (klass), TYPE_ICS_BASE) 106 #define ICS_BASE_GET_CLASS(obj) \ 107 OBJECT_GET_CLASS(ICSStateClass, (obj), TYPE_ICS_BASE) 108 109 struct ICSStateClass { 110 DeviceClass parent_class; 111 112 DeviceRealize parent_realize; 113 DeviceReset parent_reset; 114 115 void (*pre_save)(ICSState *s); 116 int (*post_load)(ICSState *s, int version_id); 117 void (*reject)(ICSState *s, uint32_t irq); 118 void (*resend)(ICSState *s); 119 void (*eoi)(ICSState *s, uint32_t irq); 120 void (*synchronize_state)(ICSState *s); 121 }; 122 123 struct ICSState { 124 /*< private >*/ 125 DeviceState parent_obj; 126 /*< public >*/ 127 uint32_t nr_irqs; 128 uint32_t offset; 129 ICSIRQState *irqs; 130 XICSFabric *xics; 131 }; 132 133 #define ICS_PROP_XICS "xics" 134 135 static inline bool ics_valid_irq(ICSState *ics, uint32_t nr) 136 { 137 return (nr >= ics->offset) && (nr < (ics->offset + ics->nr_irqs)); 138 } 139 140 struct ICSIRQState { 141 uint32_t server; 142 uint8_t priority; 143 uint8_t saved_priority; 144 #define XICS_STATUS_ASSERTED 0x1 145 #define XICS_STATUS_SENT 0x2 146 #define XICS_STATUS_REJECTED 0x4 147 #define XICS_STATUS_MASKED_PENDING 0x8 148 #define XICS_STATUS_PRESENTED 0x10 149 #define XICS_STATUS_QUEUED 0x20 150 uint8_t status; 151 /* (flags & XICS_FLAGS_IRQ_MASK) == 0 means the interrupt is not allocated */ 152 #define XICS_FLAGS_IRQ_LSI 0x1 153 #define XICS_FLAGS_IRQ_MSI 0x2 154 #define XICS_FLAGS_IRQ_MASK 0x3 155 uint8_t flags; 156 }; 157 158 struct XICSFabric { 159 Object parent; 160 }; 161 162 #define TYPE_XICS_FABRIC "xics-fabric" 163 #define XICS_FABRIC(obj) \ 164 OBJECT_CHECK(XICSFabric, (obj), TYPE_XICS_FABRIC) 165 #define XICS_FABRIC_CLASS(klass) \ 166 OBJECT_CLASS_CHECK(XICSFabricClass, (klass), TYPE_XICS_FABRIC) 167 #define XICS_FABRIC_GET_CLASS(obj) \ 168 OBJECT_GET_CLASS(XICSFabricClass, (obj), TYPE_XICS_FABRIC) 169 170 typedef struct XICSFabricClass { 171 InterfaceClass parent; 172 ICSState *(*ics_get)(XICSFabric *xi, int irq); 173 void (*ics_resend)(XICSFabric *xi); 174 ICPState *(*icp_get)(XICSFabric *xi, int server); 175 } XICSFabricClass; 176 177 ICPState *xics_icp_get(XICSFabric *xi, int server); 178 179 /* Internal XICS interfaces */ 180 void icp_set_cppr(ICPState *icp, uint8_t cppr); 181 void icp_set_mfrr(ICPState *icp, uint8_t mfrr); 182 uint32_t icp_accept(ICPState *ss); 183 uint32_t icp_ipoll(ICPState *ss, uint32_t *mfrr); 184 void icp_eoi(ICPState *icp, uint32_t xirr); 185 186 void ics_simple_write_xive(ICSState *ics, int nr, int server, 187 uint8_t priority, uint8_t saved_priority); 188 void ics_simple_set_irq(void *opaque, int srcno, int val); 189 void ics_kvm_set_irq(void *opaque, int srcno, int val); 190 191 void ics_set_irq_type(ICSState *ics, int srcno, bool lsi); 192 void icp_pic_print_info(ICPState *icp, Monitor *mon); 193 void ics_pic_print_info(ICSState *ics, Monitor *mon); 194 195 void ics_resend(ICSState *ics); 196 void icp_resend(ICPState *ss); 197 198 Object *icp_create(Object *cpu, const char *type, XICSFabric *xi, 199 Error **errp); 200 201 /* KVM */ 202 void icp_get_kvm_state(ICPState *icp); 203 int icp_set_kvm_state(ICPState *icp); 204 void icp_synchronize_state(ICPState *icp); 205 206 #endif /* XICS_H */ 207