182cffa2eSCédric Le Goater /* 282cffa2eSCédric Le Goater * QEMU PowerPC sPAPR IRQ backend definitions 382cffa2eSCédric Le Goater * 482cffa2eSCédric Le Goater * Copyright (c) 2018, IBM Corporation. 582cffa2eSCédric Le Goater * 682cffa2eSCédric Le Goater * This code is licensed under the GPL version 2 or later. See the 782cffa2eSCédric Le Goater * COPYING file in the top-level directory. 882cffa2eSCédric Le Goater */ 982cffa2eSCédric Le Goater 1082cffa2eSCédric Le Goater #ifndef HW_SPAPR_IRQ_H 1182cffa2eSCédric Le Goater #define HW_SPAPR_IRQ_H 1282cffa2eSCédric Le Goater 13ec150c7eSMarkus Armbruster #include "target/ppc/cpu-qom.h" 14ec150c7eSMarkus Armbruster 1582cffa2eSCédric Le Goater /* 1682cffa2eSCédric Le Goater * IRQ range offsets per device type 1782cffa2eSCédric Le Goater */ 18dcc345b6SCédric Le Goater #define SPAPR_IRQ_IPI 0x0 1982cffa2eSCédric Le Goater 20*ad8de986SDavid Gibson #define SPAPR_XIRQ_BASE XICS_IRQ_BASE /* 0x1000 */ 21*ad8de986SDavid Gibson #define SPAPR_IRQ_EPOW (SPAPR_XIRQ_BASE + 0x0000) 22*ad8de986SDavid Gibson #define SPAPR_IRQ_HOTPLUG (SPAPR_XIRQ_BASE + 0x0001) 23*ad8de986SDavid Gibson #define SPAPR_IRQ_VIO (SPAPR_XIRQ_BASE + 0x0100) /* 256 VIO devices */ 24*ad8de986SDavid Gibson #define SPAPR_IRQ_PCI_LSI (SPAPR_XIRQ_BASE + 0x0200) /* 32+ PHBs devices */ 25*ad8de986SDavid Gibson 26*ad8de986SDavid Gibson /* Offset of the dynamic range covered by the bitmap allocator */ 27*ad8de986SDavid Gibson #define SPAPR_IRQ_MSI (SPAPR_XIRQ_BASE + 0x0300) 28*ad8de986SDavid Gibson 29*ad8de986SDavid Gibson #define SPAPR_NR_XIRQS 0x1000 30*ad8de986SDavid Gibson #define SPAPR_NR_MSIS (SPAPR_XIRQ_BASE + SPAPR_NR_XIRQS - SPAPR_IRQ_MSI) 3182cffa2eSCédric Le Goater 32ce2918cbSDavid Gibson typedef struct SpaprMachineState SpaprMachineState; 3382cffa2eSCédric Le Goater 34ce2918cbSDavid Gibson void spapr_irq_msi_init(SpaprMachineState *spapr, uint32_t nr_msis); 35ce2918cbSDavid Gibson int spapr_irq_msi_alloc(SpaprMachineState *spapr, uint32_t num, bool align, 3682cffa2eSCédric Le Goater Error **errp); 37ce2918cbSDavid Gibson void spapr_irq_msi_free(SpaprMachineState *spapr, int irq, uint32_t num); 3882cffa2eSCédric Le Goater 39ce2918cbSDavid Gibson typedef struct SpaprIrq { 40*ad8de986SDavid Gibson uint32_t nr_xirqs; 41e39de895SCédric Le Goater uint32_t nr_msis; 42db592b5bSCédric Le Goater uint8_t ov5; 43ef01ed9dSCédric Le Goater 44ce2918cbSDavid Gibson void (*init)(SpaprMachineState *spapr, int nr_irqs, Error **errp); 45ce2918cbSDavid Gibson int (*claim)(SpaprMachineState *spapr, int irq, bool lsi, Error **errp); 46ce2918cbSDavid Gibson void (*free)(SpaprMachineState *spapr, int irq, int num); 47ce2918cbSDavid Gibson qemu_irq (*qirq)(SpaprMachineState *spapr, int irq); 48ce2918cbSDavid Gibson void (*print_info)(SpaprMachineState *spapr, Monitor *mon); 49ce2918cbSDavid Gibson void (*dt_populate)(SpaprMachineState *spapr, uint32_t nr_servers, 506e21de4aSCédric Le Goater void *fdt, uint32_t phandle); 51ce2918cbSDavid Gibson void (*cpu_intc_create)(SpaprMachineState *spapr, PowerPCCPU *cpu, 521a937ad7SCédric Le Goater Error **errp); 53ce2918cbSDavid Gibson int (*post_load)(SpaprMachineState *spapr, int version_id); 54ce2918cbSDavid Gibson void (*reset)(SpaprMachineState *spapr, Error **errp); 55872ff3deSCédric Le Goater void (*set_irq)(void *opaque, int srcno, int val); 56ce2918cbSDavid Gibson const char *(*get_nodename)(SpaprMachineState *spapr); 57ae805ea9SCédric Le Goater void (*init_kvm)(SpaprMachineState *spapr, Error **errp); 58ce2918cbSDavid Gibson } SpaprIrq; 59ef01ed9dSCédric Le Goater 60ce2918cbSDavid Gibson extern SpaprIrq spapr_irq_xics; 61ce2918cbSDavid Gibson extern SpaprIrq spapr_irq_xics_legacy; 62ce2918cbSDavid Gibson extern SpaprIrq spapr_irq_xive; 63ce2918cbSDavid Gibson extern SpaprIrq spapr_irq_dual; 64ef01ed9dSCédric Le Goater 65ce2918cbSDavid Gibson void spapr_irq_init(SpaprMachineState *spapr, Error **errp); 66ce2918cbSDavid Gibson int spapr_irq_claim(SpaprMachineState *spapr, int irq, bool lsi, Error **errp); 67ce2918cbSDavid Gibson void spapr_irq_free(SpaprMachineState *spapr, int irq, int num); 68ce2918cbSDavid Gibson qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq); 69ce2918cbSDavid Gibson int spapr_irq_post_load(SpaprMachineState *spapr, int version_id); 70ce2918cbSDavid Gibson void spapr_irq_reset(SpaprMachineState *spapr, Error **errp); 71ce2918cbSDavid Gibson int spapr_irq_get_phandle(SpaprMachineState *spapr, void *fdt, Error **errp); 72ef01ed9dSCédric Le Goater 73ef01ed9dSCédric Le Goater /* 74ef01ed9dSCédric Le Goater * XICS legacy routines 75ef01ed9dSCédric Le Goater */ 76ce2918cbSDavid Gibson int spapr_irq_find(SpaprMachineState *spapr, int num, bool align, Error **errp); 77ef01ed9dSCédric Le Goater #define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp) 78ef01ed9dSCédric Le Goater 7982cffa2eSCédric Le Goater #endif 80