182cffa2eSCédric Le Goater /* 282cffa2eSCédric Le Goater * QEMU PowerPC sPAPR IRQ backend definitions 382cffa2eSCédric Le Goater * 482cffa2eSCédric Le Goater * Copyright (c) 2018, IBM Corporation. 582cffa2eSCédric Le Goater * 682cffa2eSCédric Le Goater * This code is licensed under the GPL version 2 or later. See the 782cffa2eSCédric Le Goater * COPYING file in the top-level directory. 882cffa2eSCédric Le Goater */ 982cffa2eSCédric Le Goater 1082cffa2eSCédric Le Goater #ifndef HW_SPAPR_IRQ_H 1182cffa2eSCédric Le Goater #define HW_SPAPR_IRQ_H 1282cffa2eSCédric Le Goater 13ec150c7eSMarkus Armbruster #include "target/ppc/cpu-qom.h" 14ec150c7eSMarkus Armbruster 1582cffa2eSCédric Le Goater /* 1682cffa2eSCédric Le Goater * IRQ range offsets per device type 1782cffa2eSCédric Le Goater */ 18dcc345b6SCédric Le Goater #define SPAPR_IRQ_IPI 0x0 1982cffa2eSCédric Le Goater 20ad8de986SDavid Gibson #define SPAPR_XIRQ_BASE XICS_IRQ_BASE /* 0x1000 */ 21ad8de986SDavid Gibson #define SPAPR_IRQ_EPOW (SPAPR_XIRQ_BASE + 0x0000) 22ad8de986SDavid Gibson #define SPAPR_IRQ_HOTPLUG (SPAPR_XIRQ_BASE + 0x0001) 23ad8de986SDavid Gibson #define SPAPR_IRQ_VIO (SPAPR_XIRQ_BASE + 0x0100) /* 256 VIO devices */ 24ad8de986SDavid Gibson #define SPAPR_IRQ_PCI_LSI (SPAPR_XIRQ_BASE + 0x0200) /* 32+ PHBs devices */ 25ad8de986SDavid Gibson 26ad8de986SDavid Gibson /* Offset of the dynamic range covered by the bitmap allocator */ 27ad8de986SDavid Gibson #define SPAPR_IRQ_MSI (SPAPR_XIRQ_BASE + 0x0300) 28ad8de986SDavid Gibson 29ad8de986SDavid Gibson #define SPAPR_NR_XIRQS 0x1000 3082cffa2eSCédric Le Goater 31ce2918cbSDavid Gibson typedef struct SpaprMachineState SpaprMachineState; 3282cffa2eSCédric Le Goater 33150e25f8SDavid Gibson typedef struct SpaprInterruptController SpaprInterruptController; 34150e25f8SDavid Gibson 35150e25f8SDavid Gibson #define TYPE_SPAPR_INTC "spapr-interrupt-controller" 36150e25f8SDavid Gibson #define SPAPR_INTC(obj) \ 37150e25f8SDavid Gibson INTERFACE_CHECK(SpaprInterruptController, (obj), TYPE_SPAPR_INTC) 38150e25f8SDavid Gibson #define SPAPR_INTC_CLASS(klass) \ 39150e25f8SDavid Gibson OBJECT_CLASS_CHECK(SpaprInterruptControllerClass, (klass), TYPE_SPAPR_INTC) 40150e25f8SDavid Gibson #define SPAPR_INTC_GET_CLASS(obj) \ 41150e25f8SDavid Gibson OBJECT_GET_CLASS(SpaprInterruptControllerClass, (obj), TYPE_SPAPR_INTC) 42150e25f8SDavid Gibson 43150e25f8SDavid Gibson typedef struct SpaprInterruptControllerClass { 44150e25f8SDavid Gibson InterfaceClass parent; 45ebd6be08SDavid Gibson 4681106dddSDavid Gibson int (*activate)(SpaprInterruptController *intc, Error **errp); 4781106dddSDavid Gibson void (*deactivate)(SpaprInterruptController *intc); 4881106dddSDavid Gibson 49ebd6be08SDavid Gibson /* 50ebd6be08SDavid Gibson * These methods will typically be called on all intcs, active and 51ebd6be08SDavid Gibson * inactive 52ebd6be08SDavid Gibson */ 53ebd6be08SDavid Gibson int (*cpu_intc_create)(SpaprInterruptController *intc, 54ebd6be08SDavid Gibson PowerPCCPU *cpu, Error **errp); 55d49e8a9bSCédric Le Goater void (*cpu_intc_reset)(SpaprInterruptController *intc, PowerPCCPU *cpu); 56*0990ce6aSGreg Kurz void (*cpu_intc_destroy)(SpaprInterruptController *intc, PowerPCCPU *cpu); 570b0e52b1SDavid Gibson int (*claim_irq)(SpaprInterruptController *intc, int irq, bool lsi, 580b0e52b1SDavid Gibson Error **errp); 590b0e52b1SDavid Gibson void (*free_irq)(SpaprInterruptController *intc, int irq); 607bcdbccaSDavid Gibson 617bcdbccaSDavid Gibson /* These methods should only be called on the active intc */ 627bcdbccaSDavid Gibson void (*set_irq)(SpaprInterruptController *intc, int irq, int val); 63328d8eb2SDavid Gibson void (*print_info)(SpaprInterruptController *intc, Monitor *mon); 6405289273SDavid Gibson void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers, 6505289273SDavid Gibson void *fdt, uint32_t phandle); 66605994e5SDavid Gibson int (*post_load)(SpaprInterruptController *intc, int version_id); 67150e25f8SDavid Gibson } SpaprInterruptControllerClass; 68150e25f8SDavid Gibson 6981106dddSDavid Gibson void spapr_irq_update_active_intc(SpaprMachineState *spapr); 7081106dddSDavid Gibson 71ebd6be08SDavid Gibson int spapr_irq_cpu_intc_create(SpaprMachineState *spapr, 72ebd6be08SDavid Gibson PowerPCCPU *cpu, Error **errp); 73d49e8a9bSCédric Le Goater void spapr_irq_cpu_intc_reset(SpaprMachineState *spapr, PowerPCCPU *cpu); 74*0990ce6aSGreg Kurz void spapr_irq_cpu_intc_destroy(SpaprMachineState *spapr, PowerPCCPU *cpu); 75328d8eb2SDavid Gibson void spapr_irq_print_info(SpaprMachineState *spapr, Monitor *mon); 7605289273SDavid Gibson void spapr_irq_dt(SpaprMachineState *spapr, uint32_t nr_servers, 7705289273SDavid Gibson void *fdt, uint32_t phandle); 78ebd6be08SDavid Gibson 798cbe71ecSDavid Gibson uint32_t spapr_irq_nr_msis(SpaprMachineState *spapr); 80ce2918cbSDavid Gibson int spapr_irq_msi_alloc(SpaprMachineState *spapr, uint32_t num, bool align, 8182cffa2eSCédric Le Goater Error **errp); 82ce2918cbSDavid Gibson void spapr_irq_msi_free(SpaprMachineState *spapr, int irq, uint32_t num); 8382cffa2eSCédric Le Goater 84ce2918cbSDavid Gibson typedef struct SpaprIrq { 85ca62823bSDavid Gibson bool xics; 86ca62823bSDavid Gibson bool xive; 87ce2918cbSDavid Gibson } SpaprIrq; 88ef01ed9dSCédric Le Goater 89ce2918cbSDavid Gibson extern SpaprIrq spapr_irq_xics; 90ce2918cbSDavid Gibson extern SpaprIrq spapr_irq_xics_legacy; 91ce2918cbSDavid Gibson extern SpaprIrq spapr_irq_xive; 92ce2918cbSDavid Gibson extern SpaprIrq spapr_irq_dual; 93ef01ed9dSCédric Le Goater 94ce2918cbSDavid Gibson void spapr_irq_init(SpaprMachineState *spapr, Error **errp); 95ce2918cbSDavid Gibson int spapr_irq_claim(SpaprMachineState *spapr, int irq, bool lsi, Error **errp); 96ce2918cbSDavid Gibson void spapr_irq_free(SpaprMachineState *spapr, int irq, int num); 97ce2918cbSDavid Gibson qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq); 98ce2918cbSDavid Gibson int spapr_irq_post_load(SpaprMachineState *spapr, int version_id); 99ce2918cbSDavid Gibson void spapr_irq_reset(SpaprMachineState *spapr, Error **errp); 100ce2918cbSDavid Gibson int spapr_irq_get_phandle(SpaprMachineState *spapr, void *fdt, Error **errp); 101567192d4SDavid Gibson int spapr_irq_init_kvm(int (*fn)(SpaprInterruptController *, Error **), 102567192d4SDavid Gibson SpaprInterruptController *intc, 103567192d4SDavid Gibson Error **errp); 104ef01ed9dSCédric Le Goater 105ef01ed9dSCédric Le Goater /* 106ef01ed9dSCédric Le Goater * XICS legacy routines 107ef01ed9dSCédric Le Goater */ 108ce2918cbSDavid Gibson int spapr_irq_find(SpaprMachineState *spapr, int num, bool align, Error **errp); 109ef01ed9dSCédric Le Goater #define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, errp) 110ef01ed9dSCédric Le Goater 11182cffa2eSCédric Le Goater #endif 112