1 /* 2 * QEMU PowerPC PowerNV LPC controller 3 * 4 * Copyright (c) 2016, IBM Corporation. 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef PPC_PNV_LPC_H 21 #define PPC_PNV_LPC_H 22 23 #include "hw/ppc/pnv_psi.h" 24 #include "qom/object.h" 25 26 #define TYPE_PNV_LPC "pnv-lpc" 27 typedef struct PnvLpcClass PnvLpcClass; 28 typedef struct PnvLpcController PnvLpcController; 29 #define PNV_LPC(obj) \ 30 OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV_LPC) 31 #define TYPE_PNV8_LPC TYPE_PNV_LPC "-POWER8" 32 #define PNV8_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV8_LPC) 33 34 #define TYPE_PNV9_LPC TYPE_PNV_LPC "-POWER9" 35 #define PNV9_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV9_LPC) 36 37 #define TYPE_PNV10_LPC TYPE_PNV_LPC "-POWER10" 38 #define PNV10_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV10_LPC) 39 40 struct PnvLpcController { 41 DeviceState parent; 42 43 uint64_t eccb_stat_reg; 44 uint32_t eccb_data_reg; 45 46 /* OPB bus */ 47 MemoryRegion opb_mr; 48 AddressSpace opb_as; 49 50 /* ISA IO and Memory space */ 51 MemoryRegion isa_io; 52 MemoryRegion isa_mem; 53 MemoryRegion isa_fw; 54 55 /* Windows from OPB to ISA (aliases) */ 56 MemoryRegion opb_isa_io; 57 MemoryRegion opb_isa_mem; 58 MemoryRegion opb_isa_fw; 59 60 /* Registers */ 61 MemoryRegion lpc_hc_regs; 62 MemoryRegion opb_master_regs; 63 64 /* OPB Master LS registers */ 65 uint32_t opb_irq_route0; 66 uint32_t opb_irq_route1; 67 uint32_t opb_irq_stat; 68 uint32_t opb_irq_mask; 69 uint32_t opb_irq_pol; 70 uint32_t opb_irq_input; 71 72 /* LPC HC registers */ 73 uint32_t lpc_hc_fw_seg_idsel; 74 uint32_t lpc_hc_fw_rd_acc_size; 75 uint32_t lpc_hc_irqser_ctrl; 76 uint32_t lpc_hc_irqmask; 77 uint32_t lpc_hc_irqstat; 78 uint32_t lpc_hc_error_addr; 79 80 /* XSCOM registers */ 81 MemoryRegion xscom_regs; 82 83 /* PSI to generate interrupts */ 84 PnvPsi *psi; 85 }; 86 87 #define PNV_LPC_CLASS(klass) \ 88 OBJECT_CLASS_CHECK(PnvLpcClass, (klass), TYPE_PNV_LPC) 89 #define PNV_LPC_GET_CLASS(obj) \ 90 OBJECT_GET_CLASS(PnvLpcClass, (obj), TYPE_PNV_LPC) 91 92 struct PnvLpcClass { 93 DeviceClass parent_class; 94 95 int psi_irq; 96 97 DeviceRealize parent_realize; 98 }; 99 100 /* 101 * Old compilers error on typdef forward declarations. Keep them happy. 102 */ 103 struct PnvChip; 104 105 ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp); 106 int pnv_dt_lpc(struct PnvChip *chip, void *fdt, int root_offset, 107 uint64_t lpcm_addr, uint64_t lpcm_size); 108 109 #endif /* PPC_PNV_LPC_H */ 110