1 #if !defined(__OPENPIC_H__) 2 #define __OPENPIC_H__ 3 4 /* OpenPIC have 5 outputs per CPU connected and one IRQ out single output */ 5 enum { 6 OPENPIC_OUTPUT_INT = 0, /* IRQ */ 7 OPENPIC_OUTPUT_CINT, /* critical IRQ */ 8 OPENPIC_OUTPUT_MCK, /* Machine check event */ 9 OPENPIC_OUTPUT_DEBUG, /* Inconditional debug event */ 10 OPENPIC_OUTPUT_RESET, /* Core reset event */ 11 OPENPIC_OUTPUT_NB, 12 }; 13 14 /* OpenPIC capability flags */ 15 #define OPENPIC_FLAG_IDE_CRIT (1 << 0) 16 17 qemu_irq *openpic_init (MemoryRegion **pmem, int nb_cpus, 18 qemu_irq **irqs); 19 qemu_irq *mpic_init (MemoryRegion *address_space, hwaddr base, 20 int nb_cpus, qemu_irq **irqs); 21 #endif /* __OPENPIC_H__ */ 22