xref: /qemu/include/hw/pci/pcie_sriov.h (revision 7c0fa8dff811b5648964630a1334c3bb97e1e1c6)
1*7c0fa8dfSKnut Omang /*
2*7c0fa8dfSKnut Omang  * pcie_sriov.h:
3*7c0fa8dfSKnut Omang  *
4*7c0fa8dfSKnut Omang  * Implementation of SR/IOV emulation support.
5*7c0fa8dfSKnut Omang  *
6*7c0fa8dfSKnut Omang  * Copyright (c) 2015 Knut Omang <knut.omang@oracle.com>
7*7c0fa8dfSKnut Omang  *
8*7c0fa8dfSKnut Omang  * This work is licensed under the terms of the GNU GPL, version 2 or later.
9*7c0fa8dfSKnut Omang  * See the COPYING file in the top-level directory.
10*7c0fa8dfSKnut Omang  *
11*7c0fa8dfSKnut Omang  */
12*7c0fa8dfSKnut Omang 
13*7c0fa8dfSKnut Omang #ifndef QEMU_PCIE_SRIOV_H
14*7c0fa8dfSKnut Omang #define QEMU_PCIE_SRIOV_H
15*7c0fa8dfSKnut Omang 
16*7c0fa8dfSKnut Omang struct PCIESriovPF {
17*7c0fa8dfSKnut Omang     uint16_t num_vfs;   /* Number of virtual functions created */
18*7c0fa8dfSKnut Omang     uint8_t vf_bar_type[PCI_NUM_REGIONS];   /* Store type for each VF bar */
19*7c0fa8dfSKnut Omang     const char *vfname; /* Reference to the device type used for the VFs */
20*7c0fa8dfSKnut Omang     PCIDevice **vf;     /* Pointer to an array of num_vfs VF devices */
21*7c0fa8dfSKnut Omang };
22*7c0fa8dfSKnut Omang 
23*7c0fa8dfSKnut Omang struct PCIESriovVF {
24*7c0fa8dfSKnut Omang     PCIDevice *pf;      /* Pointer back to owner physical function */
25*7c0fa8dfSKnut Omang     uint16_t vf_number; /* Logical VF number of this function */
26*7c0fa8dfSKnut Omang };
27*7c0fa8dfSKnut Omang 
28*7c0fa8dfSKnut Omang void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset,
29*7c0fa8dfSKnut Omang                         const char *vfname, uint16_t vf_dev_id,
30*7c0fa8dfSKnut Omang                         uint16_t init_vfs, uint16_t total_vfs,
31*7c0fa8dfSKnut Omang                         uint16_t vf_offset, uint16_t vf_stride);
32*7c0fa8dfSKnut Omang void pcie_sriov_pf_exit(PCIDevice *dev);
33*7c0fa8dfSKnut Omang 
34*7c0fa8dfSKnut Omang /* Set up a VF bar in the SR/IOV bar area */
35*7c0fa8dfSKnut Omang void pcie_sriov_pf_init_vf_bar(PCIDevice *dev, int region_num,
36*7c0fa8dfSKnut Omang                                uint8_t type, dma_addr_t size);
37*7c0fa8dfSKnut Omang 
38*7c0fa8dfSKnut Omang /* Instantiate a bar for a VF */
39*7c0fa8dfSKnut Omang void pcie_sriov_vf_register_bar(PCIDevice *dev, int region_num,
40*7c0fa8dfSKnut Omang                                 MemoryRegion *memory);
41*7c0fa8dfSKnut Omang 
42*7c0fa8dfSKnut Omang /*
43*7c0fa8dfSKnut Omang  * Default (minimal) page size support values
44*7c0fa8dfSKnut Omang  * as required by the SR/IOV standard:
45*7c0fa8dfSKnut Omang  * 0x553 << 12 = 0x553000 = 4K + 8K + 64K + 256K + 1M + 4M
46*7c0fa8dfSKnut Omang  */
47*7c0fa8dfSKnut Omang #define SRIOV_SUP_PGSIZE_MINREQ 0x553
48*7c0fa8dfSKnut Omang 
49*7c0fa8dfSKnut Omang /*
50*7c0fa8dfSKnut Omang  * Optionally add supported page sizes to the mask of supported page sizes
51*7c0fa8dfSKnut Omang  * Page size values are interpreted as opt_sup_pgsize << 12.
52*7c0fa8dfSKnut Omang  */
53*7c0fa8dfSKnut Omang void pcie_sriov_pf_add_sup_pgsize(PCIDevice *dev, uint16_t opt_sup_pgsize);
54*7c0fa8dfSKnut Omang 
55*7c0fa8dfSKnut Omang /* SR/IOV capability config write handler */
56*7c0fa8dfSKnut Omang void pcie_sriov_config_write(PCIDevice *dev, uint32_t address,
57*7c0fa8dfSKnut Omang                              uint32_t val, int len);
58*7c0fa8dfSKnut Omang 
59*7c0fa8dfSKnut Omang /* Reset SR/IOV VF Enable bit to unregister all VFs */
60*7c0fa8dfSKnut Omang void pcie_sriov_pf_disable_vfs(PCIDevice *dev);
61*7c0fa8dfSKnut Omang 
62*7c0fa8dfSKnut Omang /* Get logical VF number of a VF - only valid for VFs */
63*7c0fa8dfSKnut Omang uint16_t pcie_sriov_vf_number(PCIDevice *dev);
64*7c0fa8dfSKnut Omang 
65*7c0fa8dfSKnut Omang /*
66*7c0fa8dfSKnut Omang  * Get the physical function that owns this VF.
67*7c0fa8dfSKnut Omang  * Returns NULL if dev is not a virtual function
68*7c0fa8dfSKnut Omang  */
69*7c0fa8dfSKnut Omang PCIDevice *pcie_sriov_get_pf(PCIDevice *dev);
70*7c0fa8dfSKnut Omang 
71*7c0fa8dfSKnut Omang #endif /* QEMU_PCIE_SRIOV_H */
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