1 #ifndef QEMU_PCI_BUS_H 2 #define QEMU_PCI_BUS_H 3 4 /* 5 * PCI Bus and Bridge datastructures. 6 * 7 * Do not access the following members directly; 8 * use accessor functions in pci.h, pci_bridge.h 9 */ 10 11 typedef struct PCIBusClass { 12 /*< private >*/ 13 BusClass parent_class; 14 /*< public >*/ 15 16 bool (*is_root)(PCIBus *bus); 17 } PCIBusClass; 18 19 struct PCIBus { 20 BusState qbus; 21 PCIIOMMUFunc iommu_fn; 22 void *iommu_opaque; 23 uint8_t devfn_min; 24 pci_set_irq_fn set_irq; 25 pci_map_irq_fn map_irq; 26 pci_route_irq_fn route_intx_to_irq; 27 void *irq_opaque; 28 PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX]; 29 PCIDevice *parent_dev; 30 MemoryRegion *address_space_mem; 31 MemoryRegion *address_space_io; 32 33 QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */ 34 QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */ 35 36 /* The bus IRQ state is the logical OR of the connected devices. 37 Keep a count of the number of devices with raised IRQs. */ 38 int nirq; 39 int *irq_count; 40 }; 41 42 typedef struct PCIBridgeWindows PCIBridgeWindows; 43 44 /* 45 * Aliases for each of the address space windows that the bridge 46 * can forward. Mapped into the bridge's parent's address space, 47 * as subregions. 48 */ 49 struct PCIBridgeWindows { 50 MemoryRegion alias_pref_mem; 51 MemoryRegion alias_mem; 52 MemoryRegion alias_io; 53 /* 54 * When bridge control VGA forwarding is enabled, bridges will 55 * provide positive decode on the PCI VGA defined I/O port and 56 * MMIO ranges. When enabled forwarding is only qualified on the 57 * I/O and memory enable bits in the bridge command register. 58 */ 59 MemoryRegion alias_vga[QEMU_PCI_VGA_NUM_REGIONS]; 60 }; 61 62 #define TYPE_PCI_BRIDGE "base-pci-bridge" 63 #define PCI_BRIDGE(obj) OBJECT_CHECK(PCIBridge, (obj), TYPE_PCI_BRIDGE) 64 65 struct PCIBridge { 66 /*< private >*/ 67 PCIDevice parent_obj; 68 /*< public >*/ 69 70 /* private member */ 71 PCIBus sec_bus; 72 /* 73 * Memory regions for the bridge's address spaces. These regions are not 74 * directly added to system_memory/system_io or its descendants. 75 * Bridge's secondary bus points to these, so that devices 76 * under the bridge see these regions as its address spaces. 77 * The regions are as large as the entire address space - 78 * they don't take into account any windows. 79 */ 80 MemoryRegion address_space_mem; 81 MemoryRegion address_space_io; 82 83 PCIBridgeWindows *windows; 84 85 pci_map_irq_fn map_irq; 86 const char *bus_name; 87 }; 88 89 #endif /* QEMU_PCI_BUS_H */ 90