120599463SMichael S. Tsirkin #ifndef QEMU_PCI_BUS_H 220599463SMichael S. Tsirkin #define QEMU_PCI_BUS_H 3cfb0a50aSIsaku Yamahata 4cfb0a50aSIsaku Yamahata /* 5952deab6SMichael S. Tsirkin * PCI Bus and Bridge datastructures. 668f79994SIsaku Yamahata * 7952deab6SMichael S. Tsirkin * Do not access the following members directly; 8952deab6SMichael S. Tsirkin * use accessor functions in pci.h, pci_bridge.h 9cfb0a50aSIsaku Yamahata */ 10cfb0a50aSIsaku Yamahata 11cfb0a50aSIsaku Yamahata struct PCIBus { 12cfb0a50aSIsaku Yamahata BusState qbus; 13*e00387d5SAvi Kivity PCIIOMMUFunc iommu_fn; 14*e00387d5SAvi Kivity void *iommu_opaque; 156f3279b5SIsaku Yamahata uint8_t devfn_min; 16cfb0a50aSIsaku Yamahata pci_set_irq_fn set_irq; 17cfb0a50aSIsaku Yamahata pci_map_irq_fn map_irq; 183afa9bb4SMichael S. Tsirkin pci_route_irq_fn route_intx_to_irq; 19cfb0a50aSIsaku Yamahata pci_hotplug_fn hotplug; 20cfb0a50aSIsaku Yamahata DeviceState *hotplug_qdev; 21cfb0a50aSIsaku Yamahata void *irq_opaque; 2290a20dbbSIsaku Yamahata PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX]; 23cfb0a50aSIsaku Yamahata PCIDevice *parent_dev; 245968eca3SAvi Kivity MemoryRegion *address_space_mem; 255968eca3SAvi Kivity MemoryRegion *address_space_io; 26cfb0a50aSIsaku Yamahata 27cfb0a50aSIsaku Yamahata QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */ 28cfb0a50aSIsaku Yamahata QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */ 29cfb0a50aSIsaku Yamahata 30cfb0a50aSIsaku Yamahata /* The bus IRQ state is the logical OR of the connected devices. 31cfb0a50aSIsaku Yamahata Keep a count of the number of devices with raised IRQs. */ 32cfb0a50aSIsaku Yamahata int nirq; 33cfb0a50aSIsaku Yamahata int *irq_count; 34cfb0a50aSIsaku Yamahata }; 35cfb0a50aSIsaku Yamahata 36b308c82cSAvi Kivity typedef struct PCIBridgeWindows PCIBridgeWindows; 37b308c82cSAvi Kivity 38b308c82cSAvi Kivity /* 39b308c82cSAvi Kivity * Aliases for each of the address space windows that the bridge 40b308c82cSAvi Kivity * can forward. Mapped into the bridge's parent's address space, 41b308c82cSAvi Kivity * as subregions. 42b308c82cSAvi Kivity */ 43b308c82cSAvi Kivity struct PCIBridgeWindows { 44b308c82cSAvi Kivity MemoryRegion alias_pref_mem; 45b308c82cSAvi Kivity MemoryRegion alias_mem; 46b308c82cSAvi Kivity MemoryRegion alias_io; 47ba7d8515SAlex Williamson /* 48ba7d8515SAlex Williamson * When bridge control VGA forwarding is enabled, bridges will 49ba7d8515SAlex Williamson * provide positive decode on the PCI VGA defined I/O port and 50ba7d8515SAlex Williamson * MMIO ranges. When enabled forwarding is only qualified on the 51ba7d8515SAlex Williamson * I/O and memory enable bits in the bridge command register. 52ba7d8515SAlex Williamson */ 53ba7d8515SAlex Williamson MemoryRegion alias_vga[QEMU_PCI_VGA_NUM_REGIONS]; 54b308c82cSAvi Kivity }; 55b308c82cSAvi Kivity 5668f79994SIsaku Yamahata struct PCIBridge { 57cfb0a50aSIsaku Yamahata PCIDevice dev; 5868f79994SIsaku Yamahata 5968f79994SIsaku Yamahata /* private member */ 607e98e3afSIsaku Yamahata PCIBus sec_bus; 61336411caSMichael S. Tsirkin /* 62336411caSMichael S. Tsirkin * Memory regions for the bridge's address spaces. These regions are not 63336411caSMichael S. Tsirkin * directly added to system_memory/system_io or its descendants. 64336411caSMichael S. Tsirkin * Bridge's secondary bus points to these, so that devices 65336411caSMichael S. Tsirkin * under the bridge see these regions as its address spaces. 66336411caSMichael S. Tsirkin * The regions are as large as the entire address space - 67336411caSMichael S. Tsirkin * they don't take into account any windows. 68336411caSMichael S. Tsirkin */ 69336411caSMichael S. Tsirkin MemoryRegion address_space_mem; 70336411caSMichael S. Tsirkin MemoryRegion address_space_io; 71b308c82cSAvi Kivity 72b308c82cSAvi Kivity PCIBridgeWindows *windows; 73b308c82cSAvi Kivity 7468f79994SIsaku Yamahata pci_map_irq_fn map_irq; 7568f79994SIsaku Yamahata const char *bus_name; 7668f79994SIsaku Yamahata }; 77cfb0a50aSIsaku Yamahata 7820599463SMichael S. Tsirkin #endif /* QEMU_PCI_BUS_H */ 79