120599463SMichael S. Tsirkin #ifndef QEMU_PCI_BUS_H 220599463SMichael S. Tsirkin #define QEMU_PCI_BUS_H 3cfb0a50aSIsaku Yamahata 42728a57aSPhilippe Mathieu-Daudé #include "hw/pci/pci.h" 52728a57aSPhilippe Mathieu-Daudé 6cfb0a50aSIsaku Yamahata /* 7791bf3c8SDavid Gibson * PCI Bus datastructures. 868f79994SIsaku Yamahata * 9952deab6SMichael S. Tsirkin * Do not access the following members directly; 10791bf3c8SDavid Gibson * use accessor functions in pci.h 11cfb0a50aSIsaku Yamahata */ 12cfb0a50aSIsaku Yamahata 13ce6a28eeSMarcel Apfelbaum typedef struct PCIBusClass { 14ce6a28eeSMarcel Apfelbaum /*< private >*/ 15ce6a28eeSMarcel Apfelbaum BusClass parent_class; 16ce6a28eeSMarcel Apfelbaum /*< public >*/ 17ce6a28eeSMarcel Apfelbaum 18ce6a28eeSMarcel Apfelbaum bool (*is_root)(PCIBus *bus); 19602141d9SMarcel Apfelbaum int (*bus_num)(PCIBus *bus); 206a3042b2SMarcel Apfelbaum uint16_t (*numa_node)(PCIBus *bus); 21*1c685a90SGreg Kurz bool (*allows_extended_config_space)(PCIBus *bus); 22ce6a28eeSMarcel Apfelbaum } PCIBusClass; 23ce6a28eeSMarcel Apfelbaum 24cfb0a50aSIsaku Yamahata struct PCIBus { 25cfb0a50aSIsaku Yamahata BusState qbus; 26e00387d5SAvi Kivity PCIIOMMUFunc iommu_fn; 27e00387d5SAvi Kivity void *iommu_opaque; 286f3279b5SIsaku Yamahata uint8_t devfn_min; 298b884984SMark Cave-Ayland uint32_t slot_reserved_mask; 30cfb0a50aSIsaku Yamahata pci_set_irq_fn set_irq; 31cfb0a50aSIsaku Yamahata pci_map_irq_fn map_irq; 323afa9bb4SMichael S. Tsirkin pci_route_irq_fn route_intx_to_irq; 33cfb0a50aSIsaku Yamahata void *irq_opaque; 3490a20dbbSIsaku Yamahata PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX]; 35cfb0a50aSIsaku Yamahata PCIDevice *parent_dev; 365968eca3SAvi Kivity MemoryRegion *address_space_mem; 375968eca3SAvi Kivity MemoryRegion *address_space_io; 38cfb0a50aSIsaku Yamahata 39cfb0a50aSIsaku Yamahata QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */ 40cfb0a50aSIsaku Yamahata QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */ 41cfb0a50aSIsaku Yamahata 42cfb0a50aSIsaku Yamahata /* The bus IRQ state is the logical OR of the connected devices. 43cfb0a50aSIsaku Yamahata Keep a count of the number of devices with raised IRQs. */ 44cfb0a50aSIsaku Yamahata int nirq; 45cfb0a50aSIsaku Yamahata int *irq_count; 46b86eacb8SMarcel Apfelbaum 47b86eacb8SMarcel Apfelbaum Notifier machine_done; 48cfb0a50aSIsaku Yamahata }; 49cfb0a50aSIsaku Yamahata 5020599463SMichael S. Tsirkin #endif /* QEMU_PCI_BUS_H */ 51