162be3934SPaul Burton /* 262be3934SPaul Burton * Xilinx PCIe host controller emulation. 362be3934SPaul Burton * 462be3934SPaul Burton * Copyright (c) 2016 Imagination Technologies 562be3934SPaul Burton * 662be3934SPaul Burton * This library is free software; you can redistribute it and/or 762be3934SPaul Burton * modify it under the terms of the GNU Lesser General Public 862be3934SPaul Burton * License as published by the Free Software Foundation; either 9*4a129ccdSChetan Pant * version 2.1 of the License, or (at your option) any later version. 1062be3934SPaul Burton * 1162be3934SPaul Burton * This library is distributed in the hope that it will be useful, 1262be3934SPaul Burton * but WITHOUT ANY WARRANTY; without even the implied warranty of 1362be3934SPaul Burton * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 1462be3934SPaul Burton * Lesser General Public License for more details. 1562be3934SPaul Burton * 1662be3934SPaul Burton * You should have received a copy of the GNU Lesser General Public 1762be3934SPaul Burton * License along with this library; if not, see <http://www.gnu.org/licenses/>. 1862be3934SPaul Burton */ 1962be3934SPaul Burton 2062be3934SPaul Burton #ifndef HW_XILINX_PCIE_H 2162be3934SPaul Burton #define HW_XILINX_PCIE_H 2262be3934SPaul Burton 2362be3934SPaul Burton #include "hw/sysbus.h" 24791bf3c8SDavid Gibson #include "hw/pci/pci_bridge.h" 2562be3934SPaul Burton #include "hw/pci/pcie_host.h" 26db1015e9SEduardo Habkost #include "qom/object.h" 2762be3934SPaul Burton 2862be3934SPaul Burton #define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host" 298063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(XilinxPCIEHost, XILINX_PCIE_HOST) 3062be3934SPaul Burton 3162be3934SPaul Burton #define TYPE_XILINX_PCIE_ROOT "xilinx-pcie-root" 328063396bSEduardo Habkost OBJECT_DECLARE_SIMPLE_TYPE(XilinxPCIERoot, XILINX_PCIE_ROOT) 3362be3934SPaul Burton 34db1015e9SEduardo Habkost struct XilinxPCIERoot { 3562be3934SPaul Burton PCIBridge parent_obj; 36db1015e9SEduardo Habkost }; 3762be3934SPaul Burton 3862be3934SPaul Burton typedef struct XilinxPCIEInt { 3962be3934SPaul Burton uint32_t fifo_reg1; 4062be3934SPaul Burton uint32_t fifo_reg2; 4162be3934SPaul Burton } XilinxPCIEInt; 4262be3934SPaul Burton 43db1015e9SEduardo Habkost struct XilinxPCIEHost { 4462be3934SPaul Burton PCIExpressHost parent_obj; 4562be3934SPaul Burton 4662be3934SPaul Burton char name[16]; 4762be3934SPaul Burton 4862be3934SPaul Burton uint32_t bus_nr; 4962be3934SPaul Burton uint64_t cfg_base, cfg_size; 5062be3934SPaul Burton uint64_t mmio_base, mmio_size; 5162be3934SPaul Burton bool link_up; 5262be3934SPaul Burton qemu_irq irq; 5362be3934SPaul Burton 5462be3934SPaul Burton MemoryRegion mmio, io; 5562be3934SPaul Burton 5662be3934SPaul Burton XilinxPCIERoot root; 5762be3934SPaul Burton 5862be3934SPaul Burton uint32_t intr; 5962be3934SPaul Burton uint32_t intr_mask; 6062be3934SPaul Burton XilinxPCIEInt intr_fifo[16]; 6162be3934SPaul Burton unsigned int intr_fifo_r, intr_fifo_w; 6262be3934SPaul Burton uint32_t rpscr; 63db1015e9SEduardo Habkost }; 6462be3934SPaul Burton 6562be3934SPaul Burton #endif /* HW_XILINX_PCIE_H */ 66