1 /* 2 * QEMU SPAPR PCI BUS definitions 3 * 4 * Copyright (c) 2011 Alexey Kardashevskiy <aik@au1.ibm.com> 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #if !defined(__HW_SPAPR_H__) 20 #error Please include spapr.h before this file! 21 #endif 22 23 #if !defined(__HW_SPAPR_PCI_H__) 24 #define __HW_SPAPR_PCI_H__ 25 26 #include "hw/pci/pci.h" 27 #include "hw/pci/pci_host.h" 28 #include "hw/ppc/xics.h" 29 30 #define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge" 31 #define TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE "spapr-pci-vfio-host-bridge" 32 33 #define SPAPR_PCI_HOST_BRIDGE(obj) \ 34 OBJECT_CHECK(sPAPRPHBState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) 35 36 #define SPAPR_PCI_VFIO_HOST_BRIDGE(obj) \ 37 OBJECT_CHECK(sPAPRPHBVFIOState, (obj), TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE) 38 39 #define SPAPR_PCI_HOST_BRIDGE_CLASS(klass) \ 40 OBJECT_CLASS_CHECK(sPAPRPHBClass, (klass), TYPE_SPAPR_PCI_HOST_BRIDGE) 41 #define SPAPR_PCI_HOST_BRIDGE_GET_CLASS(obj) \ 42 OBJECT_GET_CLASS(sPAPRPHBClass, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) 43 44 typedef struct sPAPRPHBClass sPAPRPHBClass; 45 typedef struct sPAPRPHBState sPAPRPHBState; 46 typedef struct sPAPRPHBVFIOState sPAPRPHBVFIOState; 47 48 struct sPAPRPHBClass { 49 PCIHostBridgeClass parent_class; 50 51 void (*finish_realize)(sPAPRPHBState *sphb, Error **errp); 52 bool eeh_available; 53 }; 54 55 typedef struct spapr_pci_msi { 56 uint32_t first_irq; 57 uint32_t num; 58 } spapr_pci_msi; 59 60 typedef struct spapr_pci_msi_mig { 61 uint32_t key; 62 spapr_pci_msi value; 63 } spapr_pci_msi_mig; 64 65 struct sPAPRPHBState { 66 PCIHostState parent_obj; 67 68 uint32_t index; 69 uint64_t buid; 70 char *dtbusname; 71 bool dr_enabled; 72 73 MemoryRegion memspace, iospace; 74 hwaddr mem_win_addr, mem_win_size, io_win_addr, io_win_size; 75 MemoryRegion memwindow, iowindow, msiwindow; 76 77 uint32_t dma_liobn; 78 hwaddr dma_win_addr, dma_win_size; 79 AddressSpace iommu_as; 80 MemoryRegion iommu_root; 81 82 struct spapr_pci_lsi { 83 uint32_t irq; 84 } lsi_table[PCI_NUM_PINS]; 85 86 GHashTable *msi; 87 /* Temporary cache for migration purposes */ 88 int32_t msi_devs_num; 89 spapr_pci_msi_mig *msi_devs; 90 91 QLIST_ENTRY(sPAPRPHBState) list; 92 }; 93 94 struct sPAPRPHBVFIOState { 95 sPAPRPHBState phb; 96 97 int32_t iommugroupid; 98 }; 99 100 #define SPAPR_PCI_MAX_INDEX 255 101 102 #define SPAPR_PCI_BASE_BUID 0x800000020000000ULL 103 104 #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL 105 106 #define SPAPR_PCI_WINDOW_BASE 0x10000000000ULL 107 #define SPAPR_PCI_WINDOW_SPACING 0x1000000000ULL 108 #define SPAPR_PCI_MMIO_WIN_OFF 0xA0000000 109 #define SPAPR_PCI_MMIO_WIN_SIZE (SPAPR_PCI_WINDOW_SPACING - \ 110 SPAPR_PCI_MEM_WIN_BUS_OFFSET) 111 #define SPAPR_PCI_IO_WIN_OFF 0x80000000 112 #define SPAPR_PCI_IO_WIN_SIZE 0x10000 113 114 #define SPAPR_PCI_MSI_WINDOW 0x40000000000ULL 115 116 static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin) 117 { 118 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); 119 120 return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq); 121 } 122 123 PCIHostState *spapr_create_phb(sPAPRMachineState *spapr, int index); 124 125 int spapr_populate_pci_dt(sPAPRPHBState *phb, 126 uint32_t xics_phandle, 127 void *fdt); 128 129 void spapr_pci_msi_init(sPAPRMachineState *spapr, hwaddr addr); 130 131 void spapr_pci_rtas_init(void); 132 133 sPAPRPHBState *spapr_pci_find_phb(sPAPRMachineState *spapr, uint64_t buid); 134 PCIDevice *spapr_pci_find_dev(sPAPRMachineState *spapr, uint64_t buid, 135 uint32_t config_addr); 136 137 /* VFIO EEH hooks */ 138 #ifdef CONFIG_LINUX 139 int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb, 140 unsigned int addr, int option); 141 int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, int *state); 142 int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option); 143 int spapr_phb_vfio_eeh_configure(sPAPRPHBState *sphb); 144 void spapr_phb_vfio_reset(DeviceState *qdev); 145 #else 146 static inline int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb, 147 unsigned int addr, int option) 148 { 149 return RTAS_OUT_HW_ERROR; 150 } 151 static inline int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, 152 int *state) 153 { 154 return RTAS_OUT_HW_ERROR; 155 } 156 static inline int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option) 157 { 158 return RTAS_OUT_HW_ERROR; 159 } 160 static inline int spapr_phb_vfio_eeh_configure(sPAPRPHBState *sphb) 161 { 162 return RTAS_OUT_HW_ERROR; 163 } 164 static inline void spapr_phb_vfio_reset(DeviceState *qdev) 165 { 166 } 167 #endif 168 169 #endif /* __HW_SPAPR_PCI_H__ */ 170