1 /* 2 * QEMU SPAPR PCI BUS definitions 3 * 4 * Copyright (c) 2011 Alexey Kardashevskiy <aik@au1.ibm.com> 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #if !defined(__HW_SPAPR_H__) 20 #error Please include spapr.h before this file! 21 #endif 22 23 #if !defined(__HW_SPAPR_PCI_H__) 24 #define __HW_SPAPR_PCI_H__ 25 26 #include "hw/pci/pci.h" 27 #include "hw/pci/pci_host.h" 28 #include "hw/ppc/xics.h" 29 30 #define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge" 31 #define TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE "spapr-pci-vfio-host-bridge" 32 33 #define SPAPR_PCI_HOST_BRIDGE(obj) \ 34 OBJECT_CHECK(sPAPRPHBState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) 35 36 #define SPAPR_PCI_VFIO_HOST_BRIDGE(obj) \ 37 OBJECT_CHECK(sPAPRPHBVFIOState, (obj), TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE) 38 39 #define SPAPR_PCI_HOST_BRIDGE_CLASS(klass) \ 40 OBJECT_CLASS_CHECK(sPAPRPHBClass, (klass), TYPE_SPAPR_PCI_HOST_BRIDGE) 41 #define SPAPR_PCI_HOST_BRIDGE_GET_CLASS(obj) \ 42 OBJECT_GET_CLASS(sPAPRPHBClass, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) 43 44 typedef struct sPAPRPHBClass sPAPRPHBClass; 45 typedef struct sPAPRPHBState sPAPRPHBState; 46 typedef struct sPAPRPHBVFIOState sPAPRPHBVFIOState; 47 48 struct sPAPRPHBClass { 49 PCIHostBridgeClass parent_class; 50 51 void (*finish_realize)(sPAPRPHBState *sphb, Error **errp); 52 }; 53 54 typedef struct spapr_pci_msi { 55 uint32_t first_irq; 56 uint32_t num; 57 } spapr_pci_msi; 58 59 typedef struct spapr_pci_msi_mig { 60 uint32_t key; 61 spapr_pci_msi value; 62 } spapr_pci_msi_mig; 63 64 struct sPAPRPHBState { 65 PCIHostState parent_obj; 66 67 uint32_t index; 68 uint64_t buid; 69 char *dtbusname; 70 bool dr_enabled; 71 72 MemoryRegion memspace, iospace; 73 hwaddr mem_win_addr, mem_win_size, io_win_addr, io_win_size; 74 MemoryRegion memwindow, iowindow, msiwindow; 75 76 uint32_t dma_liobn; 77 hwaddr dma_win_addr, dma_win_size; 78 AddressSpace iommu_as; 79 MemoryRegion iommu_root; 80 81 struct spapr_pci_lsi { 82 uint32_t irq; 83 } lsi_table[PCI_NUM_PINS]; 84 85 GHashTable *msi; 86 /* Temporary cache for migration purposes */ 87 int32_t msi_devs_num; 88 spapr_pci_msi_mig *msi_devs; 89 90 QLIST_ENTRY(sPAPRPHBState) list; 91 }; 92 93 struct sPAPRPHBVFIOState { 94 sPAPRPHBState phb; 95 96 int32_t iommugroupid; 97 }; 98 99 #define SPAPR_PCI_MAX_INDEX 255 100 101 #define SPAPR_PCI_BASE_BUID 0x800000020000000ULL 102 103 #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL 104 105 #define SPAPR_PCI_WINDOW_BASE 0x10000000000ULL 106 #define SPAPR_PCI_WINDOW_SPACING 0x1000000000ULL 107 #define SPAPR_PCI_MMIO_WIN_OFF 0xA0000000 108 #define SPAPR_PCI_MMIO_WIN_SIZE (SPAPR_PCI_WINDOW_SPACING - \ 109 SPAPR_PCI_MEM_WIN_BUS_OFFSET) 110 #define SPAPR_PCI_IO_WIN_OFF 0x80000000 111 #define SPAPR_PCI_IO_WIN_SIZE 0x10000 112 113 #define SPAPR_PCI_MSI_WINDOW 0x40000000000ULL 114 115 static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin) 116 { 117 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); 118 119 return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq); 120 } 121 122 PCIHostState *spapr_create_phb(sPAPRMachineState *spapr, int index); 123 124 int spapr_populate_pci_dt(sPAPRPHBState *phb, 125 uint32_t xics_phandle, 126 void *fdt); 127 128 void spapr_pci_msi_init(sPAPRMachineState *spapr, hwaddr addr); 129 130 void spapr_pci_rtas_init(void); 131 132 sPAPRPHBState *spapr_pci_find_phb(sPAPRMachineState *spapr, uint64_t buid); 133 PCIDevice *spapr_pci_find_dev(sPAPRMachineState *spapr, uint64_t buid, 134 uint32_t config_addr); 135 136 /* VFIO EEH hooks */ 137 #ifdef CONFIG_LINUX 138 bool spapr_phb_eeh_available(sPAPRPHBState *sphb); 139 int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb, 140 unsigned int addr, int option); 141 int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, int *state); 142 int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option); 143 int spapr_phb_vfio_eeh_configure(sPAPRPHBState *sphb); 144 void spapr_phb_vfio_reset(DeviceState *qdev); 145 #else 146 static inline bool spapr_phb_eeh_available(sPAPRPHBState *sphb) 147 { 148 return false; 149 } 150 static inline int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb, 151 unsigned int addr, int option) 152 { 153 return RTAS_OUT_HW_ERROR; 154 } 155 static inline int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, 156 int *state) 157 { 158 return RTAS_OUT_HW_ERROR; 159 } 160 static inline int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option) 161 { 162 return RTAS_OUT_HW_ERROR; 163 } 164 static inline int spapr_phb_vfio_eeh_configure(sPAPRPHBState *sphb) 165 { 166 return RTAS_OUT_HW_ERROR; 167 } 168 static inline void spapr_phb_vfio_reset(DeviceState *qdev) 169 { 170 } 171 #endif 172 173 #endif /* __HW_SPAPR_PCI_H__ */ 174