1 /* 2 * QEMU SPAPR PCI BUS definitions 3 * 4 * Copyright (c) 2011 Alexey Kardashevskiy <aik@au1.ibm.com> 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public 8 * License as published by the Free Software Foundation; either 9 * version 2 of the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 #if !defined(__HW_SPAPR_H__) 20 #error Please include spapr.h before this file! 21 #endif 22 23 #if !defined(__HW_SPAPR_PCI_H__) 24 #define __HW_SPAPR_PCI_H__ 25 26 #include "hw/pci/pci.h" 27 #include "hw/pci/pci_host.h" 28 #include "hw/ppc/xics.h" 29 30 #define SPAPR_MSIX_MAX_DEVS 32 31 32 #define TYPE_SPAPR_PCI_HOST_BRIDGE "spapr-pci-host-bridge" 33 #define TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE "spapr-pci-vfio-host-bridge" 34 35 #define SPAPR_PCI_HOST_BRIDGE(obj) \ 36 OBJECT_CHECK(sPAPRPHBState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) 37 38 #define SPAPR_PCI_VFIO_HOST_BRIDGE(obj) \ 39 OBJECT_CHECK(sPAPRPHBVFIOState, (obj), TYPE_SPAPR_PCI_VFIO_HOST_BRIDGE) 40 41 #define SPAPR_PCI_HOST_BRIDGE_CLASS(klass) \ 42 OBJECT_CLASS_CHECK(sPAPRPHBClass, (klass), TYPE_SPAPR_PCI_HOST_BRIDGE) 43 #define SPAPR_PCI_HOST_BRIDGE_GET_CLASS(obj) \ 44 OBJECT_GET_CLASS(sPAPRPHBClass, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) 45 46 typedef struct sPAPRPHBClass sPAPRPHBClass; 47 typedef struct sPAPRPHBState sPAPRPHBState; 48 typedef struct sPAPRPHBVFIOState sPAPRPHBVFIOState; 49 50 struct sPAPRPHBClass { 51 PCIHostBridgeClass parent_class; 52 53 void (*finish_realize)(sPAPRPHBState *sphb, Error **errp); 54 }; 55 56 struct sPAPRPHBState { 57 PCIHostState parent_obj; 58 59 int32_t index; 60 uint64_t buid; 61 char *dtbusname; 62 63 MemoryRegion memspace, iospace; 64 hwaddr mem_win_addr, mem_win_size, io_win_addr, io_win_size; 65 MemoryRegion memwindow, iowindow; 66 67 uint32_t dma_liobn; 68 AddressSpace iommu_as; 69 MemoryRegion iommu_root; 70 71 struct spapr_pci_lsi { 72 uint32_t irq; 73 } lsi_table[PCI_NUM_PINS]; 74 75 struct spapr_pci_msi { 76 uint32_t config_addr; 77 uint32_t irq; 78 uint32_t nvec; 79 } msi_table[SPAPR_MSIX_MAX_DEVS]; 80 81 QLIST_ENTRY(sPAPRPHBState) list; 82 }; 83 84 struct sPAPRPHBVFIOState { 85 sPAPRPHBState phb; 86 87 int32_t iommugroupid; 88 }; 89 90 #define SPAPR_PCI_BASE_BUID 0x800000020000000ULL 91 92 #define SPAPR_PCI_WINDOW_BASE 0x10000000000ULL 93 #define SPAPR_PCI_WINDOW_SPACING 0x1000000000ULL 94 #define SPAPR_PCI_MMIO_WIN_OFF 0xA0000000 95 #define SPAPR_PCI_MMIO_WIN_SIZE 0x20000000 96 #define SPAPR_PCI_IO_WIN_OFF 0x80000000 97 #define SPAPR_PCI_IO_WIN_SIZE 0x10000 98 99 #define SPAPR_PCI_MSI_WINDOW 0x40000000000ULL 100 101 #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL 102 103 static inline qemu_irq spapr_phb_lsi_qirq(struct sPAPRPHBState *phb, int pin) 104 { 105 return xics_get_qirq(spapr->icp, phb->lsi_table[pin].irq); 106 } 107 108 PCIHostState *spapr_create_phb(sPAPREnvironment *spapr, int index); 109 110 int spapr_populate_pci_dt(sPAPRPHBState *phb, 111 uint32_t xics_phandle, 112 void *fdt); 113 114 void spapr_pci_msi_init(sPAPREnvironment *spapr, hwaddr addr); 115 116 void spapr_pci_rtas_init(void); 117 118 #endif /* __HW_SPAPR_PCI_H__ */ 119