1 /* 2 * HP-PARISC Astro Bus connector with Elroy PCI host bridges 3 */ 4 5 #ifndef ASTRO_H 6 #define ASTRO_H 7 8 #include "hw/pci/pci_host.h" 9 10 #define ASTRO_HPA 0xfed00000 11 12 #define ROPES_PER_IOC 8 /* per Ike half or Pluto/Astro */ 13 14 #define TYPE_ASTRO_CHIP "astro-chip" 15 OBJECT_DECLARE_SIMPLE_TYPE(AstroState, ASTRO_CHIP) 16 17 #define TYPE_ELROY_PCI_HOST_BRIDGE "elroy-pcihost" 18 OBJECT_DECLARE_SIMPLE_TYPE(ElroyState, ELROY_PCI_HOST_BRIDGE) 19 20 #define ELROY_NUM 4 /* # of Elroys */ 21 #define ELROY_IRQS 8 /* IOSAPIC IRQs */ 22 23 /* ASTRO Memory and I/O regions */ 24 #define LMMIO_DIST_BASE_ADDR 0xf4000000ULL 25 #define LMMIO_DIST_BASE_SIZE 0x4000000ULL 26 27 #define LMMIO_DIRECT_RANGES 4 28 29 #define IOS_DIST_BASE_ADDR 0xfffee00000ULL 30 #define IOS_DIST_BASE_SIZE 0x10000ULL 31 32 #define HF_ENABLE 0x40 /* enable HF mode (default is -1 mode) */ 33 34 struct AstroState; 35 36 struct ElroyState { 37 PCIHostState parent_obj; 38 39 /* parent Astro device */ 40 struct AstroState *astro; 41 42 /* HPA of this Elroy */ 43 hwaddr hpa; 44 45 /* PCI bus number (Elroy number) */ 46 unsigned int pci_bus_num; 47 48 uint64_t config_address; 49 uint64_t config_reg_elroy; 50 51 uint64_t status_control; 52 uint64_t arb_mask; 53 uint64_t mmio_base[(0x0250 - 0x200) / 8]; 54 uint64_t error_config; 55 56 uint32_t iosapic_reg_select; 57 uint64_t iosapic_reg[0x20]; 58 59 uint32_t ilr; 60 61 MemoryRegion this_mem; 62 63 MemoryRegion pci_mmio; 64 MemoryRegion pci_mmio_alias; 65 MemoryRegion pci_hole; 66 MemoryRegion pci_io; 67 }; 68 69 struct AstroState { 70 PCIHostState parent_obj; 71 72 uint64_t ioc_ctrl; 73 uint64_t ioc_status_ctrl; 74 uint64_t ioc_ranges[(0x03d8 - 0x300) / 8]; 75 uint64_t ioc_rope_config; 76 uint64_t ioc_status_control; 77 uint64_t ioc_flush_control; 78 uint64_t ioc_rope_control[8]; 79 uint64_t tlb_ibase; 80 uint64_t tlb_imask; 81 uint64_t tlb_pcom; 82 uint64_t tlb_tcnfg; 83 uint64_t tlb_pdir_base; 84 85 struct ElroyState *elroy[ELROY_NUM]; 86 87 MemoryRegion this_mem; 88 MemoryRegion lmmio_direct[LMMIO_DIRECT_RANGES]; 89 90 IOMMUMemoryRegion iommu; 91 AddressSpace iommu_as; 92 }; 93 94 #endif 95