1*380a37e4SHao Wu /* 2*380a37e4SHao Wu * Nuvoton NPCM7xx MFT Module 3*380a37e4SHao Wu * 4*380a37e4SHao Wu * Copyright 2021 Google LLC 5*380a37e4SHao Wu * 6*380a37e4SHao Wu * This program is free software; you can redistribute it and/or modify it 7*380a37e4SHao Wu * under the terms of the GNU General Public License as published by the 8*380a37e4SHao Wu * Free Software Foundation; either version 2 of the License, or 9*380a37e4SHao Wu * (at your option) any later version. 10*380a37e4SHao Wu * 11*380a37e4SHao Wu * This program is distributed in the hope that it will be useful, but WITHOUT 12*380a37e4SHao Wu * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13*380a37e4SHao Wu * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14*380a37e4SHao Wu * for more details. 15*380a37e4SHao Wu */ 16*380a37e4SHao Wu #ifndef NPCM7XX_MFT_H 17*380a37e4SHao Wu #define NPCM7XX_MFT_H 18*380a37e4SHao Wu 19*380a37e4SHao Wu #include "exec/memory.h" 20*380a37e4SHao Wu #include "hw/clock.h" 21*380a37e4SHao Wu #include "hw/irq.h" 22*380a37e4SHao Wu #include "hw/sysbus.h" 23*380a37e4SHao Wu #include "qom/object.h" 24*380a37e4SHao Wu 25*380a37e4SHao Wu /* Max Fan input number. */ 26*380a37e4SHao Wu #define NPCM7XX_MFT_MAX_FAN_INPUT 19 27*380a37e4SHao Wu 28*380a37e4SHao Wu /* 29*380a37e4SHao Wu * Number of registers in one MFT module. Don't change this without increasing 30*380a37e4SHao Wu * the version_id in vmstate. 31*380a37e4SHao Wu */ 32*380a37e4SHao Wu #define NPCM7XX_MFT_NR_REGS (0x20 / sizeof(uint16_t)) 33*380a37e4SHao Wu 34*380a37e4SHao Wu /* 35*380a37e4SHao Wu * The MFT can take up to 4 inputs: A0, B0, A1, B1. It can measure one A and one 36*380a37e4SHao Wu * B simultaneously. NPCM7XX_MFT_INASEL and NPCM7XX_MFT_INBSEL are used to 37*380a37e4SHao Wu * select which A or B input are used. 38*380a37e4SHao Wu */ 39*380a37e4SHao Wu #define NPCM7XX_MFT_FANIN_COUNT 4 40*380a37e4SHao Wu 41*380a37e4SHao Wu /** 42*380a37e4SHao Wu * struct NPCM7xxMFTState - Multi Functional Tachometer device state. 43*380a37e4SHao Wu * @parent: System bus device. 44*380a37e4SHao Wu * @iomem: Memory region through which registers are accessed. 45*380a37e4SHao Wu * @clock_in: The input clock for MFT from CLK module. 46*380a37e4SHao Wu * @clock_{1,2}: The counter clocks for NPCM7XX_MFT_CNT{1,2} 47*380a37e4SHao Wu * @irq: The IRQ for this MFT state. 48*380a37e4SHao Wu * @regs: The MMIO registers. 49*380a37e4SHao Wu * @max_rpm: The maximum rpm for fans. Order: A0, B0, A1, B1. 50*380a37e4SHao Wu * @duty: The duty cycles for fans, relative to NPCM7XX_PWM_MAX_DUTY. 51*380a37e4SHao Wu */ 52*380a37e4SHao Wu typedef struct NPCM7xxMFTState { 53*380a37e4SHao Wu SysBusDevice parent; 54*380a37e4SHao Wu 55*380a37e4SHao Wu MemoryRegion iomem; 56*380a37e4SHao Wu 57*380a37e4SHao Wu Clock *clock_in; 58*380a37e4SHao Wu Clock *clock_1, *clock_2; 59*380a37e4SHao Wu qemu_irq irq; 60*380a37e4SHao Wu uint16_t regs[NPCM7XX_MFT_NR_REGS]; 61*380a37e4SHao Wu 62*380a37e4SHao Wu uint32_t max_rpm[NPCM7XX_MFT_FANIN_COUNT]; 63*380a37e4SHao Wu uint32_t duty[NPCM7XX_MFT_FANIN_COUNT]; 64*380a37e4SHao Wu } NPCM7xxMFTState; 65*380a37e4SHao Wu 66*380a37e4SHao Wu #define TYPE_NPCM7XX_MFT "npcm7xx-mft" 67*380a37e4SHao Wu #define NPCM7XX_MFT(obj) \ 68*380a37e4SHao Wu OBJECT_CHECK(NPCM7xxMFTState, (obj), TYPE_NPCM7XX_MFT) 69*380a37e4SHao Wu 70*380a37e4SHao Wu #endif /* NPCM7XX_MFT_H */ 71