xref: /qemu/include/hw/misc/macio/pmu.h (revision ec150c7e09071bcf51bfaa8071fe23efb6df69f7)
1d811d61fSMark Cave-Ayland /*
2d811d61fSMark Cave-Ayland  * Definitions for talking to the PMU.  The PMU is a microcontroller
3d811d61fSMark Cave-Ayland  * which controls battery charging and system power on PowerBook 3400
4d811d61fSMark Cave-Ayland  * and 2400 models as well as the RTC and various other things.
5d811d61fSMark Cave-Ayland  *
6d811d61fSMark Cave-Ayland  * Copyright (C) 1998 Paul Mackerras.
7d811d61fSMark Cave-Ayland  * Copyright (C) 2016 Ben Herrenschmidt
8d811d61fSMark Cave-Ayland  */
9d811d61fSMark Cave-Ayland 
10d811d61fSMark Cave-Ayland #ifndef PMU_H
11d811d61fSMark Cave-Ayland #define PMU_H
12d811d61fSMark Cave-Ayland 
13*ec150c7eSMarkus Armbruster #include "hw/misc/mos6522.h"
14*ec150c7eSMarkus Armbruster #include "hw/misc/macio/gpio.h"
15*ec150c7eSMarkus Armbruster 
16d811d61fSMark Cave-Ayland /*
17d811d61fSMark Cave-Ayland  * PMU commands
18d811d61fSMark Cave-Ayland  */
19d811d61fSMark Cave-Ayland 
20d811d61fSMark Cave-Ayland #define PMU_POWER_CTRL0            0x10  /* control power of some devices */
21d811d61fSMark Cave-Ayland #define PMU_POWER_CTRL             0x11  /* control power of some devices */
22d811d61fSMark Cave-Ayland #define PMU_ADB_CMD                0x20  /* send ADB packet */
23d811d61fSMark Cave-Ayland #define PMU_ADB_POLL_OFF           0x21  /* disable ADB auto-poll */
24d811d61fSMark Cave-Ayland #define PMU_WRITE_NVRAM            0x33  /* write non-volatile RAM */
25d811d61fSMark Cave-Ayland #define PMU_READ_NVRAM             0x3b  /* read non-volatile RAM */
26d811d61fSMark Cave-Ayland #define PMU_SET_RTC                0x30  /* set real-time clock */
27d811d61fSMark Cave-Ayland #define PMU_READ_RTC               0x38  /* read real-time clock */
28d811d61fSMark Cave-Ayland #define PMU_SET_VOLBUTTON          0x40  /* set volume up/down position */
29d811d61fSMark Cave-Ayland #define PMU_BACKLIGHT_BRIGHT       0x41  /* set backlight brightness */
30d811d61fSMark Cave-Ayland #define PMU_GET_VOLBUTTON          0x48  /* get volume up/down position */
31d811d61fSMark Cave-Ayland #define PMU_PCEJECT                0x4c  /* eject PC-card from slot */
32d811d61fSMark Cave-Ayland #define PMU_BATTERY_STATE          0x6b  /* report battery state etc. */
33d811d61fSMark Cave-Ayland #define PMU_SMART_BATTERY_STATE    0x6f  /* report battery state (new way) */
34d811d61fSMark Cave-Ayland #define PMU_SET_INTR_MASK          0x70  /* set PMU interrupt mask */
35d811d61fSMark Cave-Ayland #define PMU_INT_ACK                0x78  /* read interrupt bits */
36d811d61fSMark Cave-Ayland #define PMU_SHUTDOWN               0x7e  /* turn power off */
37d811d61fSMark Cave-Ayland #define PMU_CPU_SPEED              0x7d  /* control CPU speed on some models */
38d811d61fSMark Cave-Ayland #define PMU_SLEEP                  0x7f  /* put CPU to sleep */
39d811d61fSMark Cave-Ayland #define PMU_POWER_EVENTS           0x8f  /* Send power-event commands to PMU */
40d811d61fSMark Cave-Ayland #define PMU_I2C_CMD                0x9a  /* I2C operations */
41d811d61fSMark Cave-Ayland #define PMU_RESET                  0xd0  /* reset CPU */
42d811d61fSMark Cave-Ayland #define PMU_GET_BRIGHTBUTTON       0xd9  /* report brightness up/down pos */
43d811d61fSMark Cave-Ayland #define PMU_GET_COVER              0xdc  /* report cover open/closed */
44d811d61fSMark Cave-Ayland #define PMU_SYSTEM_READY           0xdf  /* tell PMU we are awake */
45d811d61fSMark Cave-Ayland #define PMU_DOWNLOAD_STATUS        0xe2  /* Called by MacOS during boot... */
46d811d61fSMark Cave-Ayland #define PMU_READ_PMU_RAM           0xe8  /* read the PMU RAM... ??? */
47d811d61fSMark Cave-Ayland #define PMU_GET_VERSION            0xea  /* read the PMU version */
48d811d61fSMark Cave-Ayland 
49d811d61fSMark Cave-Ayland /* Bits to use with the PMU_POWER_CTRL0 command */
50d811d61fSMark Cave-Ayland #define PMU_POW0_ON            0x80    /* OR this to power ON the device */
51d811d61fSMark Cave-Ayland #define PMU_POW0_OFF           0x00    /* leave bit 7 to 0 to power it OFF */
52d811d61fSMark Cave-Ayland #define PMU_POW0_HARD_DRIVE    0x04    /* Hard drive power
53d811d61fSMark Cave-Ayland                                         * (on wallstreet/lombard ?) */
54d811d61fSMark Cave-Ayland 
55d811d61fSMark Cave-Ayland /* Bits to use with the PMU_POWER_CTRL command */
56d811d61fSMark Cave-Ayland #define PMU_POW_ON             0x80    /* OR this to power ON the device */
57d811d61fSMark Cave-Ayland #define PMU_POW_OFF            0x00    /* leave bit 7 to 0 to power it OFF */
58d811d61fSMark Cave-Ayland #define PMU_POW_BACKLIGHT      0x01    /* backlight power */
59d811d61fSMark Cave-Ayland #define PMU_POW_CHARGER        0x02    /* battery charger power */
60d811d61fSMark Cave-Ayland #define PMU_POW_IRLED          0x04    /* IR led power (on wallstreet) */
61d811d61fSMark Cave-Ayland #define PMU_POW_MEDIABAY       0x08    /* media bay power
62d811d61fSMark Cave-Ayland                                         * (wallstreet/lombard ?) */
63d811d61fSMark Cave-Ayland 
64d811d61fSMark Cave-Ayland /* Bits in PMU interrupt and interrupt mask bytes */
65d811d61fSMark Cave-Ayland #define PMU_INT_PCEJECT        0x04    /* PC-card eject buttons */
66d811d61fSMark Cave-Ayland #define PMU_INT_SNDBRT         0x08    /* sound/brightness up/down buttons */
67d811d61fSMark Cave-Ayland #define PMU_INT_ADB            0x10    /* ADB autopoll or reply data */
68d811d61fSMark Cave-Ayland #define PMU_INT_BATTERY        0x20    /* Battery state change */
69d811d61fSMark Cave-Ayland #define PMU_INT_ENVIRONMENT    0x40    /* Environment interrupts */
70d811d61fSMark Cave-Ayland #define PMU_INT_TICK           0x80    /* 1-second tick interrupt */
71d811d61fSMark Cave-Ayland 
72d811d61fSMark Cave-Ayland /* Other bits in PMU interrupt valid when PMU_INT_ADB is set */
73d811d61fSMark Cave-Ayland #define PMU_INT_ADB_AUTO           0x04    /* ADB autopoll, when PMU_INT_ADB */
74d811d61fSMark Cave-Ayland #define PMU_INT_WAITING_CHARGER    0x01    /* ??? */
75d811d61fSMark Cave-Ayland #define PMU_INT_AUTO_SRQ_POLL      0x02    /* ??? */
76d811d61fSMark Cave-Ayland 
77d811d61fSMark Cave-Ayland /* Bits in the environement message (either obtained via PMU_GET_COVER,
78d811d61fSMark Cave-Ayland  * or via PMU_INT_ENVIRONMENT on core99 */
79d811d61fSMark Cave-Ayland #define PMU_ENV_LID_CLOSED     0x01    /* The lid is closed */
80d811d61fSMark Cave-Ayland 
81d811d61fSMark Cave-Ayland /* I2C related definitions */
82d811d61fSMark Cave-Ayland #define PMU_I2C_MODE_SIMPLE    0
83d811d61fSMark Cave-Ayland #define PMU_I2C_MODE_STDSUB    1
84d811d61fSMark Cave-Ayland #define PMU_I2C_MODE_COMBINED  2
85d811d61fSMark Cave-Ayland 
86d811d61fSMark Cave-Ayland #define PMU_I2C_BUS_STATUS     0
87d811d61fSMark Cave-Ayland #define PMU_I2C_BUS_SYSCLK     1
88d811d61fSMark Cave-Ayland #define PMU_I2C_BUS_POWER      2
89d811d61fSMark Cave-Ayland 
90d811d61fSMark Cave-Ayland #define PMU_I2C_STATUS_OK          0
91d811d61fSMark Cave-Ayland #define PMU_I2C_STATUS_DATAREAD    1
92d811d61fSMark Cave-Ayland #define PMU_I2C_STATUS_BUSY        0xfe
93d811d61fSMark Cave-Ayland 
94d811d61fSMark Cave-Ayland /* Kind of PMU (model) */
95d811d61fSMark Cave-Ayland enum {
96d811d61fSMark Cave-Ayland     PMU_UNKNOWN,
97d811d61fSMark Cave-Ayland     PMU_OHARE_BASED,        /* 2400, 3400, 3500 (old G3 powerbook) */
98d811d61fSMark Cave-Ayland     PMU_HEATHROW_BASED,     /* PowerBook G3 series */
99d811d61fSMark Cave-Ayland     PMU_PADDINGTON_BASED,   /* 1999 PowerBook G3 */
100d811d61fSMark Cave-Ayland     PMU_KEYLARGO_BASED,     /* Core99 motherboard (PMU99) */
101d811d61fSMark Cave-Ayland     PMU_68K_V1,             /* 68K PMU, version 1 */
102d811d61fSMark Cave-Ayland     PMU_68K_V2,             /* 68K PMU, version 2 */
103d811d61fSMark Cave-Ayland };
104d811d61fSMark Cave-Ayland 
105d811d61fSMark Cave-Ayland /* PMU PMU_POWER_EVENTS commands */
106d811d61fSMark Cave-Ayland enum {
107d811d61fSMark Cave-Ayland     PMU_PWR_GET_POWERUP_EVENTS = 0x00,
108d811d61fSMark Cave-Ayland     PMU_PWR_SET_POWERUP_EVENTS = 0x01,
109d811d61fSMark Cave-Ayland     PMU_PWR_CLR_POWERUP_EVENTS = 0x02,
110d811d61fSMark Cave-Ayland     PMU_PWR_GET_WAKEUP_EVENTS = 0x03,
111d811d61fSMark Cave-Ayland     PMU_PWR_SET_WAKEUP_EVENTS = 0x04,
112d811d61fSMark Cave-Ayland     PMU_PWR_CLR_WAKEUP_EVENTS = 0x05,
113d811d61fSMark Cave-Ayland };
114d811d61fSMark Cave-Ayland 
115d811d61fSMark Cave-Ayland /* Power events wakeup bits */
116d811d61fSMark Cave-Ayland enum {
117d811d61fSMark Cave-Ayland     PMU_PWR_WAKEUP_KEY = 0x01,           /* Wake on key press */
118d811d61fSMark Cave-Ayland     PMU_PWR_WAKEUP_AC_INSERT = 0x02,     /* Wake on AC adapter plug */
119d811d61fSMark Cave-Ayland     PMU_PWR_WAKEUP_AC_CHANGE = 0x04,
120d811d61fSMark Cave-Ayland     PMU_PWR_WAKEUP_LID_OPEN = 0x08,
121d811d61fSMark Cave-Ayland     PMU_PWR_WAKEUP_RING = 0x10,
122d811d61fSMark Cave-Ayland };
123d811d61fSMark Cave-Ayland 
124d811d61fSMark Cave-Ayland /*
125d811d61fSMark Cave-Ayland  * This table indicates for each PMU opcode:
126d811d61fSMark Cave-Ayland  * - the number of data bytes to be sent with the command, or -1
127d811d61fSMark Cave-Ayland  *   if a length byte should be sent,
128d811d61fSMark Cave-Ayland  * - the number of response bytes which the PMU will return, or
129d811d61fSMark Cave-Ayland  *   -1 if it will send a length byte.
130d811d61fSMark Cave-Ayland  */
131d811d61fSMark Cave-Ayland 
132d811d61fSMark Cave-Ayland static const int8_t pmu_data_len[256][2] = {
133d811d61fSMark Cave-Ayland /*  0        1        2        3        4        5        6        7  */
134d811d61fSMark Cave-Ayland     {-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
135d811d61fSMark Cave-Ayland     {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
136d811d61fSMark Cave-Ayland     { 1,  0},{ 1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
137d811d61fSMark Cave-Ayland     { 0,  1},{ 0,  1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{ 0,  0},
138d811d61fSMark Cave-Ayland     {-1,  0},{ 0,  0},{ 2,  0},{ 1,  0},{ 1,  0},{-1,  0},{-1,  0},{-1,  0},
139d811d61fSMark Cave-Ayland     { 0, -1},{ 0, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{ 0, -1},
140d811d61fSMark Cave-Ayland     { 4,  0},{20,  0},{-1,  0},{ 3,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
141d811d61fSMark Cave-Ayland     { 0,  4},{ 0, 20},{ 2, -1},{ 2,  1},{ 3, -1},{-1, -1},{-1, -1},{ 4,  0},
142d811d61fSMark Cave-Ayland     { 1,  0},{ 1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
143d811d61fSMark Cave-Ayland     { 0,  1},{ 0,  1},{-1, -1},{ 1,  0},{ 1,  0},{-1, -1},{-1, -1},{-1, -1},
144d811d61fSMark Cave-Ayland     { 1,  0},{ 0,  0},{ 2,  0},{ 2,  0},{-1,  0},{ 1,  0},{ 3,  0},{ 1,  0},
145d811d61fSMark Cave-Ayland     { 0,  1},{ 1,  0},{ 0,  2},{ 0,  2},{ 0, -1},{-1, -1},{-1, -1},{-1, -1},
146d811d61fSMark Cave-Ayland     { 2,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
147d811d61fSMark Cave-Ayland     { 0,  3},{ 0,  3},{ 0,  2},{ 0,  8},{ 0, -1},{ 0, -1},{-1, -1},{-1, -1},
148d811d61fSMark Cave-Ayland     { 1,  0},{ 1,  0},{ 1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
149d811d61fSMark Cave-Ayland     { 0, -1},{ 0, -1},{-1, -1},{-1, -1},{-1, -1},{ 5,  1},{ 4,  1},{ 4,  1},
150d811d61fSMark Cave-Ayland     { 4,  0},{-1,  0},{ 0,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
151d811d61fSMark Cave-Ayland     { 0,  5},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
152d811d61fSMark Cave-Ayland     { 1,  0},{ 2,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
153d811d61fSMark Cave-Ayland     { 0,  1},{ 0,  1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
154d811d61fSMark Cave-Ayland     { 2,  0},{ 2,  0},{ 2,  0},{ 4,  0},{-1,  0},{ 0,  0},{-1,  0},{-1,  0},
155d811d61fSMark Cave-Ayland     { 1,  1},{ 1,  0},{ 3,  0},{ 2,  0},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
156d811d61fSMark Cave-Ayland     {-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
157d811d61fSMark Cave-Ayland     {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
158d811d61fSMark Cave-Ayland     {-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
159d811d61fSMark Cave-Ayland     {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
160d811d61fSMark Cave-Ayland     { 0,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
161d811d61fSMark Cave-Ayland     { 1,  1},{ 1,  1},{-1, -1},{-1, -1},{ 0,  1},{ 0, -1},{-1, -1},{-1, -1},
162d811d61fSMark Cave-Ayland     {-1,  0},{ 4,  0},{ 0,  1},{-1,  0},{-1,  0},{ 4,  0},{-1,  0},{-1,  0},
163d811d61fSMark Cave-Ayland     { 3, -1},{-1, -1},{ 0,  1},{-1, -1},{ 0, -1},{-1, -1},{-1, -1},{ 0,  0},
164d811d61fSMark Cave-Ayland     {-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},{-1,  0},
165d811d61fSMark Cave-Ayland     {-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},{-1, -1},
166d811d61fSMark Cave-Ayland };
167d811d61fSMark Cave-Ayland 
168d811d61fSMark Cave-Ayland /* Command protocol state machine */
169d811d61fSMark Cave-Ayland typedef enum {
170d811d61fSMark Cave-Ayland     pmu_state_idle, /* Waiting for command */
171d811d61fSMark Cave-Ayland     pmu_state_cmd,  /* Receiving command */
172d811d61fSMark Cave-Ayland     pmu_state_rsp,  /* Responding to command */
173d811d61fSMark Cave-Ayland } PMUCmdState;
174d811d61fSMark Cave-Ayland 
175d811d61fSMark Cave-Ayland /* MOS6522 PMU */
176d811d61fSMark Cave-Ayland typedef struct MOS6522PMUState {
177d811d61fSMark Cave-Ayland     /*< private >*/
178d811d61fSMark Cave-Ayland     MOS6522State parent_obj;
179d811d61fSMark Cave-Ayland } MOS6522PMUState;
180d811d61fSMark Cave-Ayland 
181d811d61fSMark Cave-Ayland #define TYPE_MOS6522_PMU "mos6522-pmu"
182d811d61fSMark Cave-Ayland #define MOS6522_PMU(obj) OBJECT_CHECK(MOS6522PMUState, (obj), \
183d811d61fSMark Cave-Ayland                                       TYPE_MOS6522_PMU)
184d811d61fSMark Cave-Ayland /**
185d811d61fSMark Cave-Ayland  * PMUState:
186d811d61fSMark Cave-Ayland  * @last_b: last value of B register
187d811d61fSMark Cave-Ayland  */
188d811d61fSMark Cave-Ayland 
189d811d61fSMark Cave-Ayland typedef struct PMUState {
190d811d61fSMark Cave-Ayland     /*< private >*/
191d811d61fSMark Cave-Ayland     SysBusDevice parent_obj;
192d811d61fSMark Cave-Ayland     /*< public >*/
193d811d61fSMark Cave-Ayland 
194d811d61fSMark Cave-Ayland     MemoryRegion mem;
195d811d61fSMark Cave-Ayland     uint64_t frequency;
196d811d61fSMark Cave-Ayland     qemu_irq via_irq;
197d811d61fSMark Cave-Ayland     bool via_irq_state;
198d811d61fSMark Cave-Ayland 
199d811d61fSMark Cave-Ayland     /* PMU state */
200d811d61fSMark Cave-Ayland     MOS6522PMUState mos6522_pmu;
201d811d61fSMark Cave-Ayland 
202d811d61fSMark Cave-Ayland     /* PMU low level protocol state */
203d811d61fSMark Cave-Ayland     PMUCmdState cmd_state;
204d811d61fSMark Cave-Ayland     uint8_t last_b;
205d811d61fSMark Cave-Ayland     uint8_t cmd;
206d811d61fSMark Cave-Ayland     uint32_t cmdlen;
207d811d61fSMark Cave-Ayland     uint32_t rsplen;
208d811d61fSMark Cave-Ayland     uint8_t cmd_buf_pos;
209d811d61fSMark Cave-Ayland     uint8_t cmd_buf[128];
210d811d61fSMark Cave-Ayland     uint8_t cmd_rsp_pos;
211d811d61fSMark Cave-Ayland     uint8_t cmd_rsp_sz;
212d811d61fSMark Cave-Ayland     uint8_t cmd_rsp[128];
213d811d61fSMark Cave-Ayland 
214d811d61fSMark Cave-Ayland     /* PMU events/interrupts */
215d811d61fSMark Cave-Ayland     uint8_t intbits;
216d811d61fSMark Cave-Ayland     uint8_t intmask;
217d811d61fSMark Cave-Ayland 
218d811d61fSMark Cave-Ayland     /* ADB */
219d811d61fSMark Cave-Ayland     bool has_adb;
220d811d61fSMark Cave-Ayland     ADBBusState adb_bus;
221d811d61fSMark Cave-Ayland     uint16_t adb_poll_mask;
222d811d61fSMark Cave-Ayland     uint8_t autopoll_rate_ms;
223d811d61fSMark Cave-Ayland     uint8_t autopoll_mask;
224d811d61fSMark Cave-Ayland     QEMUTimer *adb_poll_timer;
225d811d61fSMark Cave-Ayland     uint8_t adb_reply_size;
226d811d61fSMark Cave-Ayland     uint8_t adb_reply[ADB_MAX_OUT_LEN];
227d811d61fSMark Cave-Ayland 
228d811d61fSMark Cave-Ayland     /* RTC */
229d811d61fSMark Cave-Ayland     uint32_t tick_offset;
230d811d61fSMark Cave-Ayland     QEMUTimer *one_sec_timer;
231d811d61fSMark Cave-Ayland     int64_t one_sec_target;
232d811d61fSMark Cave-Ayland 
233d811d61fSMark Cave-Ayland     /* GPIO */
234d811d61fSMark Cave-Ayland     MacIOGPIOState *gpio;
235d811d61fSMark Cave-Ayland } PMUState;
236d811d61fSMark Cave-Ayland 
237d811d61fSMark Cave-Ayland #define TYPE_VIA_PMU "via-pmu"
238d811d61fSMark Cave-Ayland #define VIA_PMU(obj) OBJECT_CHECK(PMUState, (obj), TYPE_VIA_PMU)
239d811d61fSMark Cave-Ayland 
240d811d61fSMark Cave-Ayland #endif /* PMU_H */
241