xref: /qemu/include/hw/misc/lasi.h (revision 134ba73f32036256e0a89bcd166ddbe1fd19b824)
1b514f432SMark Cave-Ayland /*
2b514f432SMark Cave-Ayland  * HP-PARISC Lasi chipset emulation.
3b514f432SMark Cave-Ayland  *
4b514f432SMark Cave-Ayland  * (C) 2019 by Helge Deller <deller@gmx.de>
5b514f432SMark Cave-Ayland  *
6b514f432SMark Cave-Ayland  * This work is licensed under the GNU GPL license version 2 or later.
7b514f432SMark Cave-Ayland  *
8b514f432SMark Cave-Ayland  * Documentation available at:
9b514f432SMark Cave-Ayland  * https://parisc.wiki.kernel.org/images-parisc/7/79/Lasi_ers.pdf
10b514f432SMark Cave-Ayland  */
11b514f432SMark Cave-Ayland 
12b514f432SMark Cave-Ayland #ifndef LASI_H
13b514f432SMark Cave-Ayland #define LASI_H
14b514f432SMark Cave-Ayland 
15*134ba73fSMark Cave-Ayland #include "exec/address-spaces.h"
16*134ba73fSMark Cave-Ayland #include "hw/pci/pci_host.h"
17*134ba73fSMark Cave-Ayland #include "hw/boards.h"
18*134ba73fSMark Cave-Ayland 
19b514f432SMark Cave-Ayland #define TYPE_LASI_CHIP "lasi-chip"
20b514f432SMark Cave-Ayland OBJECT_DECLARE_SIMPLE_TYPE(LasiState, LASI_CHIP)
21b514f432SMark Cave-Ayland 
22b514f432SMark Cave-Ayland #define LASI_IRR        0x00    /* RO */
23b514f432SMark Cave-Ayland #define LASI_IMR        0x04
24b514f432SMark Cave-Ayland #define LASI_IPR        0x08
25b514f432SMark Cave-Ayland #define LASI_ICR        0x0c
26b514f432SMark Cave-Ayland #define LASI_IAR        0x10
27b514f432SMark Cave-Ayland 
28ca7b468bSMark Cave-Ayland #define LASI_LPT        0x02000
29ca7b468bSMark Cave-Ayland #define LASI_UART       0x05000
30ca7b468bSMark Cave-Ayland #define LASI_LAN        0x07000
31ca7b468bSMark Cave-Ayland #define LASI_RTC        0x09000
32ca7b468bSMark Cave-Ayland 
33b514f432SMark Cave-Ayland #define LASI_PCR        0x0C000 /* LASI Power Control register */
34b514f432SMark Cave-Ayland #define LASI_ERRLOG     0x0C004 /* LASI Error Logging register */
35b514f432SMark Cave-Ayland #define LASI_VER        0x0C008 /* LASI Version Control register */
36b514f432SMark Cave-Ayland #define LASI_IORESET    0x0C00C /* LASI I/O Reset register */
37b514f432SMark Cave-Ayland #define LASI_AMR        0x0C010 /* LASI Arbitration Mask register */
38b514f432SMark Cave-Ayland #define LASI_IO_CONF    0x7FFFE /* LASI primary configuration register */
39b514f432SMark Cave-Ayland #define LASI_IO_CONF2   0x7FFFF /* LASI secondary configuration register */
40b514f432SMark Cave-Ayland 
41b514f432SMark Cave-Ayland #define LASI_BIT(x)     (1ul << (x))
42b514f432SMark Cave-Ayland #define LASI_IRQ_BITS   (LASI_BIT(5) | LASI_BIT(7) | LASI_BIT(8) | LASI_BIT(9) \
43b514f432SMark Cave-Ayland             | LASI_BIT(13) | LASI_BIT(14) | LASI_BIT(16) | LASI_BIT(17) \
44b514f432SMark Cave-Ayland             | LASI_BIT(18) | LASI_BIT(19) | LASI_BIT(20) | LASI_BIT(21) \
45b514f432SMark Cave-Ayland             | LASI_BIT(26))
46b514f432SMark Cave-Ayland 
47b514f432SMark Cave-Ayland #define ICR_BUS_ERROR_BIT  LASI_BIT(8)  /* bit 8 in ICR */
48b514f432SMark Cave-Ayland #define ICR_TOC_BIT        LASI_BIT(1)  /* bit 1 in ICR */
49b514f432SMark Cave-Ayland 
50cb9f6c4bSMark Cave-Ayland #define LASI_IRQS           27
51cb9f6c4bSMark Cave-Ayland 
520f04d577SMark Cave-Ayland #define LASI_IRQ_HPA        14
530f04d577SMark Cave-Ayland #define LASI_IRQ_UART_HPA   5
540f04d577SMark Cave-Ayland #define LASI_IRQ_LPT_HPA    7
550f04d577SMark Cave-Ayland #define LASI_IRQ_LAN_HPA    8
560f04d577SMark Cave-Ayland #define LASI_IRQ_SCSI_HPA   9
570f04d577SMark Cave-Ayland #define LASI_IRQ_AUDIO_HPA  13
580f04d577SMark Cave-Ayland #define LASI_IRQ_PS2KBD_HPA 26
590f04d577SMark Cave-Ayland #define LASI_IRQ_PS2MOU_HPA 26
600f04d577SMark Cave-Ayland 
61b514f432SMark Cave-Ayland struct LasiState {
62b514f432SMark Cave-Ayland     PCIHostState parent_obj;
63b514f432SMark Cave-Ayland 
64b514f432SMark Cave-Ayland     uint32_t irr;
65b514f432SMark Cave-Ayland     uint32_t imr;
66b514f432SMark Cave-Ayland     uint32_t ipr;
67b514f432SMark Cave-Ayland     uint32_t icr;
68b514f432SMark Cave-Ayland     uint32_t iar;
69b514f432SMark Cave-Ayland 
70b514f432SMark Cave-Ayland     uint32_t errlog;
71b514f432SMark Cave-Ayland     uint32_t amr;
72b514f432SMark Cave-Ayland     uint32_t rtc;
73b514f432SMark Cave-Ayland     time_t rtc_ref;
74b514f432SMark Cave-Ayland 
75b514f432SMark Cave-Ayland     MemoryRegion this_mem;
76b514f432SMark Cave-Ayland };
77b514f432SMark Cave-Ayland 
78b514f432SMark Cave-Ayland #endif
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