1b514f432SMark Cave-Ayland /* 2b514f432SMark Cave-Ayland * HP-PARISC Lasi chipset emulation. 3b514f432SMark Cave-Ayland * 4b514f432SMark Cave-Ayland * (C) 2019 by Helge Deller <deller@gmx.de> 5b514f432SMark Cave-Ayland * 6b514f432SMark Cave-Ayland * This work is licensed under the GNU GPL license version 2 or later. 7b514f432SMark Cave-Ayland * 8b514f432SMark Cave-Ayland * Documentation available at: 9b514f432SMark Cave-Ayland * https://parisc.wiki.kernel.org/images-parisc/7/79/Lasi_ers.pdf 10b514f432SMark Cave-Ayland */ 11b514f432SMark Cave-Ayland 12b514f432SMark Cave-Ayland #ifndef LASI_H 13b514f432SMark Cave-Ayland #define LASI_H 14b514f432SMark Cave-Ayland 15*dfc56946SRichard Henderson #include "system/address-spaces.h" 16134ba73fSMark Cave-Ayland #include "hw/pci/pci_host.h" 17134ba73fSMark Cave-Ayland #include "hw/boards.h" 18134ba73fSMark Cave-Ayland 19b514f432SMark Cave-Ayland #define TYPE_LASI_CHIP "lasi-chip" 20b514f432SMark Cave-Ayland OBJECT_DECLARE_SIMPLE_TYPE(LasiState, LASI_CHIP) 21b514f432SMark Cave-Ayland 22b514f432SMark Cave-Ayland #define LASI_IRR 0x00 /* RO */ 23b514f432SMark Cave-Ayland #define LASI_IMR 0x04 24b514f432SMark Cave-Ayland #define LASI_IPR 0x08 25b514f432SMark Cave-Ayland #define LASI_ICR 0x0c 26b514f432SMark Cave-Ayland #define LASI_IAR 0x10 27b514f432SMark Cave-Ayland 28ca7b468bSMark Cave-Ayland #define LASI_LPT 0x02000 2932d26ea4SHelge Deller #define LASI_AUDIO 0x04000 30ca7b468bSMark Cave-Ayland #define LASI_UART 0x05000 31ca7b468bSMark Cave-Ayland #define LASI_LAN 0x07000 32ca7b468bSMark Cave-Ayland #define LASI_RTC 0x09000 3332d26ea4SHelge Deller #define LASI_FDC 0x0A000 34ca7b468bSMark Cave-Ayland 35b514f432SMark Cave-Ayland #define LASI_PCR 0x0C000 /* LASI Power Control register */ 36b514f432SMark Cave-Ayland #define LASI_ERRLOG 0x0C004 /* LASI Error Logging register */ 37b514f432SMark Cave-Ayland #define LASI_VER 0x0C008 /* LASI Version Control register */ 38b514f432SMark Cave-Ayland #define LASI_IORESET 0x0C00C /* LASI I/O Reset register */ 39b514f432SMark Cave-Ayland #define LASI_AMR 0x0C010 /* LASI Arbitration Mask register */ 40b514f432SMark Cave-Ayland #define LASI_IO_CONF 0x7FFFE /* LASI primary configuration register */ 41b514f432SMark Cave-Ayland #define LASI_IO_CONF2 0x7FFFF /* LASI secondary configuration register */ 42b514f432SMark Cave-Ayland 43b514f432SMark Cave-Ayland #define LASI_BIT(x) (1ul << (x)) 44b514f432SMark Cave-Ayland #define LASI_IRQ_BITS (LASI_BIT(5) | LASI_BIT(7) | LASI_BIT(8) | LASI_BIT(9) \ 45b514f432SMark Cave-Ayland | LASI_BIT(13) | LASI_BIT(14) | LASI_BIT(16) | LASI_BIT(17) \ 46b514f432SMark Cave-Ayland | LASI_BIT(18) | LASI_BIT(19) | LASI_BIT(20) | LASI_BIT(21) \ 47b514f432SMark Cave-Ayland | LASI_BIT(26)) 48b514f432SMark Cave-Ayland 49b514f432SMark Cave-Ayland #define ICR_BUS_ERROR_BIT LASI_BIT(8) /* bit 8 in ICR */ 50b514f432SMark Cave-Ayland #define ICR_TOC_BIT LASI_BIT(1) /* bit 1 in ICR */ 51b514f432SMark Cave-Ayland 52cb9f6c4bSMark Cave-Ayland #define LASI_IRQS 27 53cb9f6c4bSMark Cave-Ayland 540f04d577SMark Cave-Ayland #define LASI_IRQ_HPA 14 550f04d577SMark Cave-Ayland #define LASI_IRQ_UART_HPA 5 560f04d577SMark Cave-Ayland #define LASI_IRQ_LPT_HPA 7 570f04d577SMark Cave-Ayland #define LASI_IRQ_LAN_HPA 8 580f04d577SMark Cave-Ayland #define LASI_IRQ_SCSI_HPA 9 590f04d577SMark Cave-Ayland #define LASI_IRQ_AUDIO_HPA 13 600f04d577SMark Cave-Ayland #define LASI_IRQ_PS2KBD_HPA 26 610f04d577SMark Cave-Ayland #define LASI_IRQ_PS2MOU_HPA 26 620f04d577SMark Cave-Ayland 63b514f432SMark Cave-Ayland struct LasiState { 64b514f432SMark Cave-Ayland PCIHostState parent_obj; 65b514f432SMark Cave-Ayland 66b514f432SMark Cave-Ayland uint32_t irr; 67b514f432SMark Cave-Ayland uint32_t imr; 68b514f432SMark Cave-Ayland uint32_t ipr; 69b514f432SMark Cave-Ayland uint32_t icr; 70b514f432SMark Cave-Ayland uint32_t iar; 71b514f432SMark Cave-Ayland 72b514f432SMark Cave-Ayland uint32_t errlog; 73b514f432SMark Cave-Ayland uint32_t amr; 74a6450830SPaolo Bonzini uint32_t rtc_ref; 75b514f432SMark Cave-Ayland 76b514f432SMark Cave-Ayland MemoryRegion this_mem; 77b514f432SMark Cave-Ayland }; 78b514f432SMark Cave-Ayland 79b514f432SMark Cave-Ayland #endif 80