xref: /qemu/include/hw/misc/imx31_ccm.h (revision fea01f9604cc7f7834911d9b0517fa48b6e32147)
1cb54d868SJean-Christophe Dubois /*
2cb54d868SJean-Christophe Dubois  * IMX31 Clock Control Module
3cb54d868SJean-Christophe Dubois  *
4cb54d868SJean-Christophe Dubois  * Copyright (C) 2012 NICTA
5cb54d868SJean-Christophe Dubois  * Updated by Jean-Christophe Dubois <jcd@tribudubois.net>
6cb54d868SJean-Christophe Dubois  *
7cb54d868SJean-Christophe Dubois  * This work is licensed under the terms of the GNU GPL, version 2 or later.
8cb54d868SJean-Christophe Dubois  * See the COPYING file in the top-level directory.
9cb54d868SJean-Christophe Dubois  */
10cb54d868SJean-Christophe Dubois 
11cb54d868SJean-Christophe Dubois #ifndef IMX31_CCM_H
12cb54d868SJean-Christophe Dubois #define IMX31_CCM_H
13cb54d868SJean-Christophe Dubois 
14cb54d868SJean-Christophe Dubois #include "hw/misc/imx_ccm.h"
15cb54d868SJean-Christophe Dubois 
16*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_CCMR_REG  0
17*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_PDR0_REG  1
18*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_PDR1_REG  2
19*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_RCSR_REG  3
20*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_MPCTL_REG 4
21*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_UPCTL_REG 5
22*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_SPCTL_REG 6
23*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_COSR_REG  7
24*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_CGR0_REG  8
25*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_CGR1_REG  9
26*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_CGR2_REG  10
27*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_WIMR_REG  11
28*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_LDC_REG   12
29*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_DCVR0_REG 13
30*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_DCVR1_REG 14
31*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_DCVR2_REG 15
32*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_DCVR3_REG 16
33*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_LTR0_REG  17
34*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_LTR1_REG  18
35*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_LTR2_REG  19
36*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_LTR3_REG  20
37*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_LTBR0_REG 21
38*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_LTBR1_REG 22
39*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_PMCR0_REG 23
40*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_PMCR1_REG 24
41*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_PDR2_REG  25
42*fea01f96SJean-Christophe DUBOIS #define IMX31_CCM_MAX_REG   26
43*fea01f96SJean-Christophe DUBOIS 
44cb54d868SJean-Christophe Dubois /* CCMR */
45cb54d868SJean-Christophe Dubois #define CCMR_FPME    (1<<0)
46cb54d868SJean-Christophe Dubois #define CCMR_MPE     (1<<3)
47cb54d868SJean-Christophe Dubois #define CCMR_MDS     (1<<7)
48cb54d868SJean-Christophe Dubois #define CCMR_FPMF    (1<<26)
49cb54d868SJean-Christophe Dubois #define CCMR_PRCS    (3<<1)
50cb54d868SJean-Christophe Dubois 
51cb54d868SJean-Christophe Dubois #define PMCR0_DFSUP1 (1<<31)
52cb54d868SJean-Christophe Dubois 
53cb54d868SJean-Christophe Dubois /* PDR0 */
54cb54d868SJean-Christophe Dubois #define PDR0_MCU_PODF_SHIFT (0)
55cb54d868SJean-Christophe Dubois #define PDR0_MCU_PODF_MASK (0x7)
56cb54d868SJean-Christophe Dubois #define PDR0_MAX_PODF_SHIFT (3)
57cb54d868SJean-Christophe Dubois #define PDR0_MAX_PODF_MASK (0x7)
58cb54d868SJean-Christophe Dubois #define PDR0_IPG_PODF_SHIFT (6)
59cb54d868SJean-Christophe Dubois #define PDR0_IPG_PODF_MASK (0x3)
60cb54d868SJean-Christophe Dubois #define PDR0_NFC_PODF_SHIFT (8)
61cb54d868SJean-Christophe Dubois #define PDR0_NFC_PODF_MASK (0x7)
62cb54d868SJean-Christophe Dubois #define PDR0_HSP_PODF_SHIFT (11)
63cb54d868SJean-Christophe Dubois #define PDR0_HSP_PODF_MASK (0x7)
64cb54d868SJean-Christophe Dubois #define PDR0_PER_PODF_SHIFT (16)
65cb54d868SJean-Christophe Dubois #define PDR0_PER_PODF_MASK (0x1f)
66cb54d868SJean-Christophe Dubois #define PDR0_CSI_PODF_SHIFT (23)
67cb54d868SJean-Christophe Dubois #define PDR0_CSI_PODF_MASK (0x1ff)
68cb54d868SJean-Christophe Dubois 
69cb54d868SJean-Christophe Dubois #define EXTRACT(value, name) (((value) >> PDR0_##name##_PODF_SHIFT) \
70cb54d868SJean-Christophe Dubois                               & PDR0_##name##_PODF_MASK)
71cb54d868SJean-Christophe Dubois #define INSERT(value, name) (((value) & PDR0_##name##_PODF_MASK) << \
72cb54d868SJean-Christophe Dubois                              PDR0_##name##_PODF_SHIFT)
73cb54d868SJean-Christophe Dubois 
74cb54d868SJean-Christophe Dubois #define TYPE_IMX31_CCM "imx31.ccm"
75cb54d868SJean-Christophe Dubois #define IMX31_CCM(obj) OBJECT_CHECK(IMX31CCMState, (obj), TYPE_IMX31_CCM)
76cb54d868SJean-Christophe Dubois 
77cb54d868SJean-Christophe Dubois typedef struct IMX31CCMState {
78cb54d868SJean-Christophe Dubois     /* <private> */
79cb54d868SJean-Christophe Dubois     IMXCCMState parent_obj;
80cb54d868SJean-Christophe Dubois 
81cb54d868SJean-Christophe Dubois     /* <public> */
82cb54d868SJean-Christophe Dubois     MemoryRegion iomem;
83cb54d868SJean-Christophe Dubois 
84*fea01f96SJean-Christophe DUBOIS     uint32_t reg[IMX31_CCM_MAX_REG];
85*fea01f96SJean-Christophe DUBOIS 
86cb54d868SJean-Christophe Dubois } IMX31CCMState;
87cb54d868SJean-Christophe Dubois 
88cb54d868SJean-Christophe Dubois #endif /* IMX31_CCM_H */
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