xref: /qemu/include/hw/misc/aspeed_hace.h (revision 1877069c9d2ad4d08d72aa41edff156c0dc65bf0)
1c5475b3fSJoel Stanley /*
2c5475b3fSJoel Stanley  * ASPEED Hash and Crypto Engine
3c5475b3fSJoel Stanley  *
4c5475b3fSJoel Stanley  * Copyright (C) 2021 IBM Corp.
5c5475b3fSJoel Stanley  *
6c5475b3fSJoel Stanley  * SPDX-License-Identifier: GPL-2.0-or-later
7c5475b3fSJoel Stanley  */
8c5475b3fSJoel Stanley 
9c5475b3fSJoel Stanley #ifndef ASPEED_HACE_H
10c5475b3fSJoel Stanley #define ASPEED_HACE_H
11c5475b3fSJoel Stanley 
12c5475b3fSJoel Stanley #include "hw/sysbus.h"
13c5475b3fSJoel Stanley 
14c5475b3fSJoel Stanley #define TYPE_ASPEED_HACE "aspeed.hace"
15c5475b3fSJoel Stanley #define TYPE_ASPEED_AST2400_HACE TYPE_ASPEED_HACE "-ast2400"
16c5475b3fSJoel Stanley #define TYPE_ASPEED_AST2500_HACE TYPE_ASPEED_HACE "-ast2500"
17c5475b3fSJoel Stanley #define TYPE_ASPEED_AST2600_HACE TYPE_ASPEED_HACE "-ast2600"
18c5475b3fSJoel Stanley OBJECT_DECLARE_TYPE(AspeedHACEState, AspeedHACEClass, ASPEED_HACE)
19c5475b3fSJoel Stanley 
20c5475b3fSJoel Stanley #define ASPEED_HACE_NR_REGS (0x64 >> 2)
21c5475b3fSJoel Stanley 
22c5475b3fSJoel Stanley struct AspeedHACEState {
23c5475b3fSJoel Stanley     SysBusDevice parent;
24c5475b3fSJoel Stanley 
25c5475b3fSJoel Stanley     MemoryRegion iomem;
26c5475b3fSJoel Stanley     qemu_irq irq;
27c5475b3fSJoel Stanley 
28c5475b3fSJoel Stanley     uint32_t regs[ASPEED_HACE_NR_REGS];
29c5475b3fSJoel Stanley 
30c5475b3fSJoel Stanley     MemoryRegion *dram_mr;
31c5475b3fSJoel Stanley     AddressSpace dram_as;
32c5475b3fSJoel Stanley };
33c5475b3fSJoel Stanley 
34c5475b3fSJoel Stanley 
35c5475b3fSJoel Stanley struct AspeedHACEClass {
36c5475b3fSJoel Stanley     SysBusDeviceClass parent_class;
37c5475b3fSJoel Stanley 
38c5475b3fSJoel Stanley     uint32_t src_mask;
39c5475b3fSJoel Stanley     uint32_t dest_mask;
40*1877069cSSteven Lee     uint32_t key_mask;
41c5475b3fSJoel Stanley     uint32_t hash_mask;
42c5475b3fSJoel Stanley };
43c5475b3fSJoel Stanley 
44c5475b3fSJoel Stanley #endif /* _ASPEED_HACE_H_ */
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