1*4239b311SPeter Maydell /* 2*4239b311SPeter Maydell * ARM SSE CPU PWRCTRL register block 3*4239b311SPeter Maydell * 4*4239b311SPeter Maydell * Copyright (c) 2021 Linaro Limited 5*4239b311SPeter Maydell * Written by Peter Maydell 6*4239b311SPeter Maydell * 7*4239b311SPeter Maydell * This program is free software; you can redistribute it and/or modify 8*4239b311SPeter Maydell * it under the terms of the GNU General Public License version 2 or 9*4239b311SPeter Maydell * (at your option) any later version. 10*4239b311SPeter Maydell */ 11*4239b311SPeter Maydell 12*4239b311SPeter Maydell /* 13*4239b311SPeter Maydell * This is a model of the "CPU<N>_PWRCTRL block" which is part of the 14*4239b311SPeter Maydell * Arm Corstone SSE-300 Example Subsystem and documented in 15*4239b311SPeter Maydell * https://developer.arm.com/documentation/101773/0000 16*4239b311SPeter Maydell * 17*4239b311SPeter Maydell * QEMU interface: 18*4239b311SPeter Maydell * + sysbus MMIO region 0: the register bank 19*4239b311SPeter Maydell */ 20*4239b311SPeter Maydell 21*4239b311SPeter Maydell #ifndef HW_MISC_ARMSSE_CPU_PWRCTRL_H 22*4239b311SPeter Maydell #define HW_MISC_ARMSSE_CPU_PWRCTRL_H 23*4239b311SPeter Maydell 24*4239b311SPeter Maydell #include "hw/sysbus.h" 25*4239b311SPeter Maydell #include "qom/object.h" 26*4239b311SPeter Maydell 27*4239b311SPeter Maydell #define TYPE_ARMSSE_CPU_PWRCTRL "armsse-cpu-pwrctrl" 28*4239b311SPeter Maydell OBJECT_DECLARE_SIMPLE_TYPE(ARMSSECPUPwrCtrl, ARMSSE_CPU_PWRCTRL) 29*4239b311SPeter Maydell 30*4239b311SPeter Maydell struct ARMSSECPUPwrCtrl { 31*4239b311SPeter Maydell /*< private >*/ 32*4239b311SPeter Maydell SysBusDevice parent_obj; 33*4239b311SPeter Maydell 34*4239b311SPeter Maydell /*< public >*/ 35*4239b311SPeter Maydell MemoryRegion iomem; 36*4239b311SPeter Maydell 37*4239b311SPeter Maydell uint32_t cpupwrcfg; 38*4239b311SPeter Maydell }; 39*4239b311SPeter Maydell 40*4239b311SPeter Maydell #endif 41