1fef06c8bSNiek Linnenbank /* 2fef06c8bSNiek Linnenbank * Allwinner H3 Clock Control Unit emulation 3fef06c8bSNiek Linnenbank * 4fef06c8bSNiek Linnenbank * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com> 5fef06c8bSNiek Linnenbank * 6fef06c8bSNiek Linnenbank * This program is free software: you can redistribute it and/or modify 7fef06c8bSNiek Linnenbank * it under the terms of the GNU General Public License as published by 8fef06c8bSNiek Linnenbank * the Free Software Foundation, either version 2 of the License, or 9fef06c8bSNiek Linnenbank * (at your option) any later version. 10fef06c8bSNiek Linnenbank * 11fef06c8bSNiek Linnenbank * This program is distributed in the hope that it will be useful, 12fef06c8bSNiek Linnenbank * but WITHOUT ANY WARRANTY; without even the implied warranty of 13fef06c8bSNiek Linnenbank * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14fef06c8bSNiek Linnenbank * GNU General Public License for more details. 15fef06c8bSNiek Linnenbank * 16fef06c8bSNiek Linnenbank * You should have received a copy of the GNU General Public License 17fef06c8bSNiek Linnenbank * along with this program. If not, see <http://www.gnu.org/licenses/>. 18fef06c8bSNiek Linnenbank */ 19fef06c8bSNiek Linnenbank 20fef06c8bSNiek Linnenbank #ifndef HW_MISC_ALLWINNER_H3_CCU_H 21fef06c8bSNiek Linnenbank #define HW_MISC_ALLWINNER_H3_CCU_H 22fef06c8bSNiek Linnenbank 23fef06c8bSNiek Linnenbank #include "qom/object.h" 24fef06c8bSNiek Linnenbank #include "hw/sysbus.h" 25fef06c8bSNiek Linnenbank 26fef06c8bSNiek Linnenbank /** 27fef06c8bSNiek Linnenbank * @name Constants 28fef06c8bSNiek Linnenbank * @{ 29fef06c8bSNiek Linnenbank */ 30fef06c8bSNiek Linnenbank 31fef06c8bSNiek Linnenbank /** Size of register I/O address space used by CCU device */ 32fef06c8bSNiek Linnenbank #define AW_H3_CCU_IOSIZE (0x400) 33fef06c8bSNiek Linnenbank 34fef06c8bSNiek Linnenbank /** Total number of known registers */ 35fef06c8bSNiek Linnenbank #define AW_H3_CCU_REGS_NUM (AW_H3_CCU_IOSIZE / sizeof(uint32_t)) 36fef06c8bSNiek Linnenbank 37fef06c8bSNiek Linnenbank /** @} */ 38fef06c8bSNiek Linnenbank 39fef06c8bSNiek Linnenbank /** 40fef06c8bSNiek Linnenbank * @name Object model 41fef06c8bSNiek Linnenbank * @{ 42fef06c8bSNiek Linnenbank */ 43fef06c8bSNiek Linnenbank 44fef06c8bSNiek Linnenbank #define TYPE_AW_H3_CCU "allwinner-h3-ccu" 45*db1015e9SEduardo Habkost typedef struct AwH3ClockCtlState AwH3ClockCtlState; 46fef06c8bSNiek Linnenbank #define AW_H3_CCU(obj) \ 47fef06c8bSNiek Linnenbank OBJECT_CHECK(AwH3ClockCtlState, (obj), TYPE_AW_H3_CCU) 48fef06c8bSNiek Linnenbank 49fef06c8bSNiek Linnenbank /** @} */ 50fef06c8bSNiek Linnenbank 51fef06c8bSNiek Linnenbank /** 52fef06c8bSNiek Linnenbank * Allwinner H3 CCU object instance state. 53fef06c8bSNiek Linnenbank */ 54*db1015e9SEduardo Habkost struct AwH3ClockCtlState { 55fef06c8bSNiek Linnenbank /*< private >*/ 56fef06c8bSNiek Linnenbank SysBusDevice parent_obj; 57fef06c8bSNiek Linnenbank /*< public >*/ 58fef06c8bSNiek Linnenbank 59fef06c8bSNiek Linnenbank /** Maps I/O registers in physical memory */ 60fef06c8bSNiek Linnenbank MemoryRegion iomem; 61fef06c8bSNiek Linnenbank 62fef06c8bSNiek Linnenbank /** Array of hardware registers */ 63fef06c8bSNiek Linnenbank uint32_t regs[AW_H3_CCU_REGS_NUM]; 64fef06c8bSNiek Linnenbank 65*db1015e9SEduardo Habkost }; 66fef06c8bSNiek Linnenbank 67fef06c8bSNiek Linnenbank #endif /* HW_MISC_ALLWINNER_H3_CCU_H */ 68