187ecb68bSpbrook #ifndef HW_MIPS_H 287ecb68bSpbrook #define HW_MIPS_H 387ecb68bSpbrook /* Definitions for mips board emulation. */ 487ecb68bSpbrook 587ecb68bSpbrook /* gt64xxx.c */ 687ecb68bSpbrook PCIBus *pci_gt64120_init(qemu_irq *pic); 787ecb68bSpbrook 8*d0f7453dSHuacai Chen /* bonito.c */ 9*d0f7453dSHuacai Chen PCIBus *bonito_init(qemu_irq *pic); 10*d0f7453dSHuacai Chen 1187ecb68bSpbrook /* ds1225y.c */ 12c227f099SAnthony Liguori void *ds1225y_init(target_phys_addr_t mem_base, const char *filename); 1302cb1585Saurel32 void ds1225y_set_protection(void *opaque, int protection); 1487ecb68bSpbrook 154ce7ff6eSaurel32 /* g364fb.c */ 16c227f099SAnthony Liguori int g364fb_mm_init(target_phys_addr_t vram_base, 17c227f099SAnthony Liguori target_phys_addr_t ctrl_base, int it_shift, 180add30cfSaurel32 qemu_irq irq); 194ce7ff6eSaurel32 2087ecb68bSpbrook /* mipsnet.c */ 2187ecb68bSpbrook void mipsnet_init(int base, qemu_irq irq, NICInfo *nd); 2287ecb68bSpbrook 2387ecb68bSpbrook /* jazz_led.c */ 24c227f099SAnthony Liguori extern void jazz_led_init(target_phys_addr_t base); 2587ecb68bSpbrook 264ce7ff6eSaurel32 /* rc4030.c */ 27c6945b15Saurel32 typedef struct rc4030DMAState *rc4030_dma; 28c227f099SAnthony Liguori void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write); 2968238a9eSaurel32 void rc4030_dma_read(void *dma, uint8_t *buf, int len); 3068238a9eSaurel32 void rc4030_dma_write(void *dma, uint8_t *buf, int len); 3168238a9eSaurel32 3268238a9eSaurel32 void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus, 3368238a9eSaurel32 qemu_irq **irqs, rc4030_dma **dmas); 344ce7ff6eSaurel32 35a65f56eeSaurel32 /* dp8393x.c */ 36c227f099SAnthony Liguori void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift, 37a65f56eeSaurel32 qemu_irq irq, void* mem_opaque, 38c227f099SAnthony Liguori void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write)); 39a65f56eeSaurel32 4087ecb68bSpbrook #endif 41