xref: /qemu/include/hw/isa/i8259_internal.h (revision 852c27e2ba99939e13a8e87f0d1a43aaec805f56)
1512709f5SJan Kiszka /*
2512709f5SJan Kiszka  * QEMU 8259 - internal interfaces
3512709f5SJan Kiszka  *
4512709f5SJan Kiszka  * Copyright (c) 2011 Jan Kiszka, Siemens AG
5512709f5SJan Kiszka  *
6512709f5SJan Kiszka  * Permission is hereby granted, free of charge, to any person obtaining a copy
7512709f5SJan Kiszka  * of this software and associated documentation files (the "Software"), to deal
8512709f5SJan Kiszka  * in the Software without restriction, including without limitation the rights
9512709f5SJan Kiszka  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10512709f5SJan Kiszka  * copies of the Software, and to permit persons to whom the Software is
11512709f5SJan Kiszka  * furnished to do so, subject to the following conditions:
12512709f5SJan Kiszka  *
13512709f5SJan Kiszka  * The above copyright notice and this permission notice shall be included in
14512709f5SJan Kiszka  * all copies or substantial portions of the Software.
15512709f5SJan Kiszka  *
16512709f5SJan Kiszka  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17512709f5SJan Kiszka  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18512709f5SJan Kiszka  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19512709f5SJan Kiszka  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20512709f5SJan Kiszka  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21512709f5SJan Kiszka  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22512709f5SJan Kiszka  * THE SOFTWARE.
23512709f5SJan Kiszka  */
24512709f5SJan Kiszka 
25512709f5SJan Kiszka #ifndef QEMU_I8259_INTERNAL_H
26512709f5SJan Kiszka #define QEMU_I8259_INTERNAL_H
27512709f5SJan Kiszka 
280d09e41aSPaolo Bonzini #include "hw/isa/isa.h"
291b23190aSPeter Xu #include "hw/intc/intc.h"
30*852c27e2SPaolo Bonzini #include "hw/intc/i8259.h"
31512709f5SJan Kiszka 
32512709f5SJan Kiszka typedef struct PICCommonState PICCommonState;
33512709f5SJan Kiszka 
348f04ee08SAnthony Liguori #define TYPE_PIC_COMMON "pic-common"
358f04ee08SAnthony Liguori #define PIC_COMMON(obj) \
3625d87288SAndreas Färber      OBJECT_CHECK(PICCommonState, (obj), TYPE_PIC_COMMON)
378f04ee08SAnthony Liguori #define PIC_COMMON_CLASS(klass) \
388f04ee08SAnthony Liguori      OBJECT_CLASS_CHECK(PICCommonClass, (klass), TYPE_PIC_COMMON)
398f04ee08SAnthony Liguori #define PIC_COMMON_GET_CLASS(obj) \
408f04ee08SAnthony Liguori      OBJECT_GET_CLASS(PICCommonClass, (obj), TYPE_PIC_COMMON)
418f04ee08SAnthony Liguori 
428f04ee08SAnthony Liguori typedef struct PICCommonClass
438f04ee08SAnthony Liguori {
448f04ee08SAnthony Liguori     ISADeviceClass parent_class;
45d2628b7dSAndreas Färber 
468f04ee08SAnthony Liguori     void (*pre_save)(PICCommonState *s);
478f04ee08SAnthony Liguori     void (*post_load)(PICCommonState *s);
488f04ee08SAnthony Liguori } PICCommonClass;
498f04ee08SAnthony Liguori 
50512709f5SJan Kiszka struct PICCommonState {
5129bb5317SAndreas Färber     ISADevice parent_obj;
5229bb5317SAndreas Färber 
53512709f5SJan Kiszka     uint8_t last_irr; /* edge detection */
54512709f5SJan Kiszka     uint8_t irr; /* interrupt request register */
55512709f5SJan Kiszka     uint8_t imr; /* interrupt mask register */
56512709f5SJan Kiszka     uint8_t isr; /* interrupt service register */
57512709f5SJan Kiszka     uint8_t priority_add; /* highest irq priority */
58512709f5SJan Kiszka     uint8_t irq_base;
59512709f5SJan Kiszka     uint8_t read_reg_select;
60512709f5SJan Kiszka     uint8_t poll;
61512709f5SJan Kiszka     uint8_t special_mask;
62512709f5SJan Kiszka     uint8_t init_state;
63512709f5SJan Kiszka     uint8_t auto_eoi;
64512709f5SJan Kiszka     uint8_t rotate_on_auto_eoi;
65512709f5SJan Kiszka     uint8_t special_fully_nested_mode;
66512709f5SJan Kiszka     uint8_t init4; /* true if 4 byte init */
67512709f5SJan Kiszka     uint8_t single_mode; /* true if slave pic is not initialized */
68512709f5SJan Kiszka     uint8_t elcr; /* PIIX edge/trigger selection*/
69512709f5SJan Kiszka     uint8_t elcr_mask;
70512709f5SJan Kiszka     qemu_irq int_out[1];
71512709f5SJan Kiszka     uint32_t master; /* reflects /SP input pin */
72512709f5SJan Kiszka     uint32_t iobase;
73512709f5SJan Kiszka     uint32_t elcr_addr;
74512709f5SJan Kiszka     MemoryRegion base_io;
75512709f5SJan Kiszka     MemoryRegion elcr_io;
76512709f5SJan Kiszka };
77512709f5SJan Kiszka 
78512709f5SJan Kiszka void pic_reset_common(PICCommonState *s);
79512709f5SJan Kiszka ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master);
801b23190aSPeter Xu void pic_stat_update_irq(int irq, int level);
811b23190aSPeter Xu bool pic_get_statistics(InterruptStatsProvider *obj,
821b23190aSPeter Xu                         uint64_t **irq_counts, unsigned int *nb_irqs);
831b23190aSPeter Xu void pic_print_info(InterruptStatsProvider *obj, Monitor *mon);
84512709f5SJan Kiszka 
85175de524SMarkus Armbruster #endif /* QEMU_I8259_INTERNAL_H */
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