17e555781SBibo Mao /* SPDX-License-Identifier: GPL-2.0-or-later */ 27e555781SBibo Mao /* 37e555781SBibo Mao * Loongson ipi interrupt header files 47e555781SBibo Mao * 57e555781SBibo Mao * Copyright (C) 2021 Loongson Technology Corporation Limited 67e555781SBibo Mao */ 77e555781SBibo Mao 87e555781SBibo Mao #ifndef HW_LOONGSON_IPI_COMMON_H 97e555781SBibo Mao #define HW_LOONGSON_IPI_COMMON_H 107e555781SBibo Mao 117e555781SBibo Mao #include "qom/object.h" 127e555781SBibo Mao #include "hw/sysbus.h" 137e555781SBibo Mao 14*6c8698a5SBibo Mao #define IPI_MBX_NUM 4 15*6c8698a5SBibo Mao 167e555781SBibo Mao #define TYPE_LOONGSON_IPI_COMMON "loongson_ipi_common" 177e555781SBibo Mao OBJECT_DECLARE_TYPE(LoongsonIPICommonState, 187e555781SBibo Mao LoongsonIPICommonClass, LOONGSON_IPI_COMMON) 197e555781SBibo Mao 20*6c8698a5SBibo Mao typedef struct IPICore { 21*6c8698a5SBibo Mao LoongsonIPICommonState *ipi; 22*6c8698a5SBibo Mao uint32_t status; 23*6c8698a5SBibo Mao uint32_t en; 24*6c8698a5SBibo Mao uint32_t set; 25*6c8698a5SBibo Mao uint32_t clear; 26*6c8698a5SBibo Mao /* 64bit buf divide into 2 32-bit buf */ 27*6c8698a5SBibo Mao uint32_t buf[IPI_MBX_NUM * 2]; 28*6c8698a5SBibo Mao qemu_irq irq; 29*6c8698a5SBibo Mao } IPICore; 30*6c8698a5SBibo Mao 317e555781SBibo Mao struct LoongsonIPICommonState { 327e555781SBibo Mao SysBusDevice parent_obj; 33*6c8698a5SBibo Mao 34*6c8698a5SBibo Mao MemoryRegion ipi_iocsr_mem; 35*6c8698a5SBibo Mao MemoryRegion ipi64_iocsr_mem; 36*6c8698a5SBibo Mao uint32_t num_cpu; 37*6c8698a5SBibo Mao IPICore *cpu; 387e555781SBibo Mao }; 397e555781SBibo Mao 407e555781SBibo Mao struct LoongsonIPICommonClass { 417e555781SBibo Mao SysBusDeviceClass parent_class; 427e555781SBibo Mao }; 437e555781SBibo Mao 442252e6c9SBibo Mao /* Mainy used by iocsr read and write */ 452252e6c9SBibo Mao #define SMP_IPI_MAILBOX 0x1000ULL 462252e6c9SBibo Mao 472252e6c9SBibo Mao #define CORE_STATUS_OFF 0x0 482252e6c9SBibo Mao #define CORE_EN_OFF 0x4 492252e6c9SBibo Mao #define CORE_SET_OFF 0x8 502252e6c9SBibo Mao #define CORE_CLEAR_OFF 0xc 512252e6c9SBibo Mao #define CORE_BUF_20 0x20 522252e6c9SBibo Mao #define CORE_BUF_28 0x28 532252e6c9SBibo Mao #define CORE_BUF_30 0x30 542252e6c9SBibo Mao #define CORE_BUF_38 0x38 552252e6c9SBibo Mao #define IOCSR_IPI_SEND 0x40 562252e6c9SBibo Mao #define IOCSR_MAIL_SEND 0x48 572252e6c9SBibo Mao #define IOCSR_ANY_SEND 0x158 582252e6c9SBibo Mao 592252e6c9SBibo Mao #define MAIL_SEND_ADDR (SMP_IPI_MAILBOX + IOCSR_MAIL_SEND) 602252e6c9SBibo Mao #define MAIL_SEND_OFFSET 0 612252e6c9SBibo Mao #define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND) 622252e6c9SBibo Mao 637e555781SBibo Mao #endif 64