10f4fcf18SXiaojuan Yang /* SPDX-License-Identifier: GPL-2.0-or-later */ 20f4fcf18SXiaojuan Yang /* 30f4fcf18SXiaojuan Yang * LoongArch 7A1000 I/O interrupt controller definitions 40f4fcf18SXiaojuan Yang * 50f4fcf18SXiaojuan Yang * Copyright (c) 2021 Loongson Technology Corporation Limited 60f4fcf18SXiaojuan Yang */ 70f4fcf18SXiaojuan Yang 8deeca9cbSBibo Mao #ifndef HW_LOONGARCH_PCH_PIC_H 9deeca9cbSBibo Mao #define HW_LOONGARCH_PCH_PIC_H 10deeca9cbSBibo Mao 11deeca9cbSBibo Mao #include "hw/intc/loongarch_pic_common.h" 127a5951f6SMarkus Armbruster 138bf26a9eSBibo Mao #define TYPE_LOONGARCH_PIC "loongarch_pic" 148bf26a9eSBibo Mao #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PIC#name 158bf26a9eSBibo Mao OBJECT_DECLARE_TYPE(LoongarchPICState, LoongarchPICClass, LOONGARCH_PIC) 168bf26a9eSBibo Mao 178bf26a9eSBibo Mao struct LoongarchPICState { 188bf26a9eSBibo Mao LoongArchPICCommonState parent_obj; 198bf26a9eSBibo Mao }; 208bf26a9eSBibo Mao 218bf26a9eSBibo Mao struct LoongarchPICClass { 228bf26a9eSBibo Mao LoongArchPICCommonClass parent_class; 238bf26a9eSBibo Mao 248bf26a9eSBibo Mao DeviceRealize parent_realize; 25*a41a74caSBibo Mao ResettablePhases parent_phases; 268bf26a9eSBibo Mao }; 278bf26a9eSBibo Mao 28deeca9cbSBibo Mao #endif /* HW_LOONGARCH_PCH_PIC_H */ 29