1*78cb12a9SPeter Maydell /* 2*78cb12a9SPeter Maydell * Samsung exynos4210 GIC implementation. Based on hw/arm_gic.c 3*78cb12a9SPeter Maydell * 4*78cb12a9SPeter Maydell * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd. 5*78cb12a9SPeter Maydell * All rights reserved. 6*78cb12a9SPeter Maydell * 7*78cb12a9SPeter Maydell * Evgeny Voevodin <e.voevodin@samsung.com> 8*78cb12a9SPeter Maydell * 9*78cb12a9SPeter Maydell * This program is free software; you can redistribute it and/or modify it 10*78cb12a9SPeter Maydell * under the terms of the GNU General Public License as published by the 11*78cb12a9SPeter Maydell * Free Software Foundation; either version 2 of the License, or (at your 12*78cb12a9SPeter Maydell * option) any later version. 13*78cb12a9SPeter Maydell * 14*78cb12a9SPeter Maydell * This program is distributed in the hope that it will be useful, 15*78cb12a9SPeter Maydell * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*78cb12a9SPeter Maydell * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 17*78cb12a9SPeter Maydell * See the GNU General Public License for more details. 18*78cb12a9SPeter Maydell * 19*78cb12a9SPeter Maydell * You should have received a copy of the GNU General Public License along 20*78cb12a9SPeter Maydell * with this program; if not, see <http://www.gnu.org/licenses/>. 21*78cb12a9SPeter Maydell */ 22*78cb12a9SPeter Maydell #ifndef HW_INTC_EXYNOS4210_GIC_H 23*78cb12a9SPeter Maydell #define HW_INTC_EXYNOS4210_GIC_H 24*78cb12a9SPeter Maydell 25*78cb12a9SPeter Maydell #include "hw/sysbus.h" 26*78cb12a9SPeter Maydell 27*78cb12a9SPeter Maydell #define TYPE_EXYNOS4210_GIC "exynos4210.gic" 28*78cb12a9SPeter Maydell OBJECT_DECLARE_SIMPLE_TYPE(Exynos4210GicState, EXYNOS4210_GIC) 29*78cb12a9SPeter Maydell 30*78cb12a9SPeter Maydell #define EXYNOS4210_GIC_NCPUS 2 31*78cb12a9SPeter Maydell 32*78cb12a9SPeter Maydell struct Exynos4210GicState { 33*78cb12a9SPeter Maydell SysBusDevice parent_obj; 34*78cb12a9SPeter Maydell 35*78cb12a9SPeter Maydell MemoryRegion cpu_container; 36*78cb12a9SPeter Maydell MemoryRegion dist_container; 37*78cb12a9SPeter Maydell MemoryRegion cpu_alias[EXYNOS4210_GIC_NCPUS]; 38*78cb12a9SPeter Maydell MemoryRegion dist_alias[EXYNOS4210_GIC_NCPUS]; 39*78cb12a9SPeter Maydell uint32_t num_cpu; 40*78cb12a9SPeter Maydell DeviceState *gic; 41*78cb12a9SPeter Maydell }; 42*78cb12a9SPeter Maydell 43*78cb12a9SPeter Maydell #endif 44