xref: /qemu/include/hw/intc/armv7m_nvic.h (revision c4379b4874f4c522f6818f1720f295205d7cf34d)
16bf436cfSPeter Maydell /*
26bf436cfSPeter Maydell  * ARMv7M NVIC object
36bf436cfSPeter Maydell  *
46bf436cfSPeter Maydell  * Copyright (c) 2017 Linaro Ltd
56bf436cfSPeter Maydell  * Written by Peter Maydell <peter.maydell@linaro.org>
66bf436cfSPeter Maydell  *
76bf436cfSPeter Maydell  * This code is licensed under the GPL version 2 or later.
86bf436cfSPeter Maydell  */
96bf436cfSPeter Maydell 
106bf436cfSPeter Maydell #ifndef HW_ARM_ARMV7M_NVIC_H
116bf436cfSPeter Maydell #define HW_ARM_ARMV7M_NVIC_H
126bf436cfSPeter Maydell 
136bf436cfSPeter Maydell #include "target/arm/cpu.h"
146bf436cfSPeter Maydell #include "hw/sysbus.h"
15ff68dacbSPeter Maydell #include "hw/timer/armv7m_systick.h"
166bf436cfSPeter Maydell 
176bf436cfSPeter Maydell #define TYPE_NVIC "armv7m_nvic"
186bf436cfSPeter Maydell 
196bf436cfSPeter Maydell #define NVIC(obj) \
206bf436cfSPeter Maydell     OBJECT_CHECK(NVICState, (obj), TYPE_NVIC)
216bf436cfSPeter Maydell 
226bf436cfSPeter Maydell /* Highest permitted number of exceptions (architectural limit) */
236bf436cfSPeter Maydell #define NVIC_MAX_VECTORS 512
2417906a16SPeter Maydell /* Number of internal exceptions */
2517906a16SPeter Maydell #define NVIC_INTERNAL_VECTORS 16
266bf436cfSPeter Maydell 
276bf436cfSPeter Maydell typedef struct VecInfo {
286bf436cfSPeter Maydell     /* Exception priorities can range from -3 to 255; only the unmodifiable
296bf436cfSPeter Maydell      * priority values for RESET, NMI and HardFault can be negative.
306bf436cfSPeter Maydell      */
316bf436cfSPeter Maydell     int16_t prio;
326bf436cfSPeter Maydell     uint8_t enabled;
336bf436cfSPeter Maydell     uint8_t pending;
346bf436cfSPeter Maydell     uint8_t active;
356bf436cfSPeter Maydell     uint8_t level; /* exceptions <=15 never set level */
366bf436cfSPeter Maydell } VecInfo;
376bf436cfSPeter Maydell 
386bf436cfSPeter Maydell typedef struct NVICState {
396bf436cfSPeter Maydell     /*< private >*/
406bf436cfSPeter Maydell     SysBusDevice parent_obj;
416bf436cfSPeter Maydell     /*< public >*/
426bf436cfSPeter Maydell 
436bf436cfSPeter Maydell     ARMCPU *cpu;
446bf436cfSPeter Maydell 
456bf436cfSPeter Maydell     VecInfo vectors[NVIC_MAX_VECTORS];
4617906a16SPeter Maydell     /* If the v8M security extension is implemented, some of the internal
4717906a16SPeter Maydell      * exceptions are banked between security states (ie there exists both
4817906a16SPeter Maydell      * a Secure and a NonSecure version of the exception and its state):
4917906a16SPeter Maydell      *  HardFault, MemManage, UsageFault, SVCall, PendSV, SysTick (R_PJHV)
5017906a16SPeter Maydell      * The rest (including all the external exceptions) are not banked, though
5117906a16SPeter Maydell      * they may be configurable to target either Secure or NonSecure state.
5217906a16SPeter Maydell      * We store the secure exception state in sec_vectors[] for the banked
5317906a16SPeter Maydell      * exceptions, and otherwise use only vectors[] (including for exceptions
5417906a16SPeter Maydell      * like SecureFault that unconditionally target Secure state).
5517906a16SPeter Maydell      * Entries in sec_vectors[] for non-banked exception numbers are unused.
5617906a16SPeter Maydell      */
5717906a16SPeter Maydell     VecInfo sec_vectors[NVIC_INTERNAL_VECTORS];
583b2e9344SPeter Maydell     /* The PRIGROUP field in AIRCR is banked */
593b2e9344SPeter Maydell     uint32_t prigroup[M_REG_NUM_BANKS];
60*c4379b48SJulia Suvorova     uint8_t num_prio_bits;
616bf436cfSPeter Maydell 
62e1be0a57SPeter Maydell     /* v8M NVIC_ITNS state (stored as a bool per bit) */
63e1be0a57SPeter Maydell     bool itns[NVIC_MAX_VECTORS];
64e1be0a57SPeter Maydell 
65e93bc2acSPeter Maydell     /* The following fields are all cached state that can be recalculated
66e93bc2acSPeter Maydell      * from the vectors[] and sec_vectors[] arrays and the prigroup field:
67e93bc2acSPeter Maydell      *  - vectpending
68e93bc2acSPeter Maydell      *  - vectpending_is_secure
69e93bc2acSPeter Maydell      *  - exception_prio
705255fcf8SPeter Maydell      *  - vectpending_prio
716bf436cfSPeter Maydell      */
726bf436cfSPeter Maydell     unsigned int vectpending; /* highest prio pending enabled exception */
73e93bc2acSPeter Maydell     /* true if vectpending is a banked secure exception, ie it is in
74e93bc2acSPeter Maydell      * sec_vectors[] rather than vectors[]
75e93bc2acSPeter Maydell      */
76e93bc2acSPeter Maydell     bool vectpending_is_s_banked;
776bf436cfSPeter Maydell     int exception_prio; /* group prio of the highest prio active exception */
785255fcf8SPeter Maydell     int vectpending_prio; /* group prio of the exeception in vectpending */
796bf436cfSPeter Maydell 
806bf436cfSPeter Maydell     MemoryRegion sysregmem;
81f104919dSPeter Maydell     MemoryRegion sysreg_ns_mem;
8227f26bfeSPeter Maydell     MemoryRegion systickmem;
8327f26bfeSPeter Maydell     MemoryRegion systick_ns_mem;
846bf436cfSPeter Maydell     MemoryRegion container;
856bf436cfSPeter Maydell 
866bf436cfSPeter Maydell     uint32_t num_irq;
876bf436cfSPeter Maydell     qemu_irq excpout;
886bf436cfSPeter Maydell     qemu_irq sysresetreq;
89ff68dacbSPeter Maydell 
9027f26bfeSPeter Maydell     SysTickState systick[M_REG_NUM_BANKS];
916bf436cfSPeter Maydell } NVICState;
926bf436cfSPeter Maydell 
936bf436cfSPeter Maydell #endif
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