1386ce3c7SPavel Fedin /* 2386ce3c7SPavel Fedin * ITS support for ARM GICv3 3386ce3c7SPavel Fedin * 4386ce3c7SPavel Fedin * Copyright (c) 2015 Samsung Electronics Co., Ltd. 5386ce3c7SPavel Fedin * Written by Pavel Fedin 6386ce3c7SPavel Fedin * 7386ce3c7SPavel Fedin * This program is free software; you can redistribute it and/or modify 8386ce3c7SPavel Fedin * it under the terms of the GNU General Public License as published by 9386ce3c7SPavel Fedin * the Free Software Foundation, either version 2 of the License, or 10386ce3c7SPavel Fedin * (at your option) any later version. 11386ce3c7SPavel Fedin * 12386ce3c7SPavel Fedin * This program is distributed in the hope that it will be useful, 13386ce3c7SPavel Fedin * but WITHOUT ANY WARRANTY; without even the implied warranty of 14386ce3c7SPavel Fedin * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15386ce3c7SPavel Fedin * GNU General Public License for more details. 16386ce3c7SPavel Fedin * 17386ce3c7SPavel Fedin * You should have received a copy of the GNU General Public License along 18386ce3c7SPavel Fedin * with this program; if not, see <http://www.gnu.org/licenses/>. 19386ce3c7SPavel Fedin */ 20386ce3c7SPavel Fedin 21386ce3c7SPavel Fedin #ifndef QEMU_ARM_GICV3_ITS_COMMON_H 22386ce3c7SPavel Fedin #define QEMU_ARM_GICV3_ITS_COMMON_H 23386ce3c7SPavel Fedin 24386ce3c7SPavel Fedin #include "hw/sysbus.h" 25386ce3c7SPavel Fedin #include "hw/intc/arm_gicv3_common.h" 26db1015e9SEduardo Habkost #include "qom/object.h" 27386ce3c7SPavel Fedin 2818f6290aSShashi Mallela #define TYPE_ARM_GICV3_ITS "arm-gicv3-its" 2918f6290aSShashi Mallela 30386ce3c7SPavel Fedin #define ITS_CONTROL_SIZE 0x10000 31386ce3c7SPavel Fedin #define ITS_TRANS_SIZE 0x10000 32386ce3c7SPavel Fedin #define ITS_SIZE (ITS_CONTROL_SIZE + ITS_TRANS_SIZE) 33386ce3c7SPavel Fedin 34cddafd8fSEric Auger #define GITS_CTLR 0x0 35cddafd8fSEric Auger #define GITS_IIDR 0x4 3618f6290aSShashi Mallela #define GITS_TYPER 0x8 37cddafd8fSEric Auger #define GITS_CBASER 0x80 38cddafd8fSEric Auger #define GITS_CWRITER 0x88 39cddafd8fSEric Auger #define GITS_CREADR 0x90 40cddafd8fSEric Auger #define GITS_BASER 0x100 41cddafd8fSEric Auger 4218f6290aSShashi Mallela #define GITS_TRANSLATER 0x0040 4318f6290aSShashi Mallela 441b08e436SShashi Mallela typedef struct { 451b08e436SShashi Mallela bool valid; 461b08e436SShashi Mallela bool indirect; 471b08e436SShashi Mallela uint16_t entry_sz; 481b08e436SShashi Mallela uint32_t page_sz; 49*80dcd37fSPeter Maydell uint32_t num_entries; 50*80dcd37fSPeter Maydell uint32_t num_ids; 511b08e436SShashi Mallela uint64_t base_addr; 521b08e436SShashi Mallela } TableDesc; 531b08e436SShashi Mallela 541b08e436SShashi Mallela typedef struct { 551b08e436SShashi Mallela bool valid; 56*80dcd37fSPeter Maydell uint32_t num_entries; 571b08e436SShashi Mallela uint64_t base_addr; 581b08e436SShashi Mallela } CmdQDesc; 591b08e436SShashi Mallela 60386ce3c7SPavel Fedin struct GICv3ITSState { 61386ce3c7SPavel Fedin SysBusDevice parent_obj; 62386ce3c7SPavel Fedin 63386ce3c7SPavel Fedin MemoryRegion iomem_main; 64386ce3c7SPavel Fedin MemoryRegion iomem_its_cntrl; 65386ce3c7SPavel Fedin MemoryRegion iomem_its_translation; 66386ce3c7SPavel Fedin 67386ce3c7SPavel Fedin GICv3State *gicv3; 68386ce3c7SPavel Fedin 69386ce3c7SPavel Fedin int dev_fd; /* kvm device fd if backed by kvm vgic support */ 70386ce3c7SPavel Fedin uint64_t gits_translater_gpa; 71386ce3c7SPavel Fedin bool translater_gpa_known; 72386ce3c7SPavel Fedin 73386ce3c7SPavel Fedin /* Registers */ 74386ce3c7SPavel Fedin uint32_t ctlr; 75cddafd8fSEric Auger uint32_t iidr; 7618f6290aSShashi Mallela uint64_t typer; 77386ce3c7SPavel Fedin uint64_t cbaser; 78386ce3c7SPavel Fedin uint64_t cwriter; 79386ce3c7SPavel Fedin uint64_t creadr; 80386ce3c7SPavel Fedin uint64_t baser[8]; 81386ce3c7SPavel Fedin 821b08e436SShashi Mallela TableDesc dt; 831b08e436SShashi Mallela TableDesc ct; 841b08e436SShashi Mallela CmdQDesc cq; 851b08e436SShashi Mallela 86386ce3c7SPavel Fedin Error *migration_blocker; 87386ce3c7SPavel Fedin }; 88386ce3c7SPavel Fedin 89386ce3c7SPavel Fedin typedef struct GICv3ITSState GICv3ITSState; 90386ce3c7SPavel Fedin 9118f6290aSShashi Mallela void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops, 9218f6290aSShashi Mallela const MemoryRegionOps *tops); 93386ce3c7SPavel Fedin 94386ce3c7SPavel Fedin #define TYPE_ARM_GICV3_ITS_COMMON "arm-gicv3-its-common" 95db1015e9SEduardo Habkost typedef struct GICv3ITSCommonClass GICv3ITSCommonClass; 968110fa1dSEduardo Habkost DECLARE_OBJ_CHECKERS(GICv3ITSState, GICv3ITSCommonClass, 978110fa1dSEduardo Habkost ARM_GICV3_ITS_COMMON, TYPE_ARM_GICV3_ITS_COMMON) 98386ce3c7SPavel Fedin 99386ce3c7SPavel Fedin struct GICv3ITSCommonClass { 100386ce3c7SPavel Fedin /*< private >*/ 101386ce3c7SPavel Fedin SysBusDeviceClass parent_class; 102386ce3c7SPavel Fedin /*< public >*/ 103386ce3c7SPavel Fedin 104386ce3c7SPavel Fedin int (*send_msi)(GICv3ITSState *s, uint32_t data, uint16_t devid); 105386ce3c7SPavel Fedin void (*pre_save)(GICv3ITSState *s); 106386ce3c7SPavel Fedin void (*post_load)(GICv3ITSState *s); 107386ce3c7SPavel Fedin }; 108386ce3c7SPavel Fedin 109386ce3c7SPavel Fedin 110386ce3c7SPavel Fedin #endif 111