xref: /qemu/include/hw/intc/arm_gicv3_common.h (revision ff8f06ee7680fb505079d33caaf8f5ebff0853bc)
1*ff8f06eeSShlomo Pongratz /*
2*ff8f06eeSShlomo Pongratz  * ARM GIC support
3*ff8f06eeSShlomo Pongratz  *
4*ff8f06eeSShlomo Pongratz  * Copyright (c) 2012 Linaro Limited
5*ff8f06eeSShlomo Pongratz  * Copyright (c) 2015 Huawei.
6*ff8f06eeSShlomo Pongratz  * Written by Peter Maydell
7*ff8f06eeSShlomo Pongratz  * Extended to 64 cores by Shlomo Pongratz
8*ff8f06eeSShlomo Pongratz  *
9*ff8f06eeSShlomo Pongratz  * This program is free software; you can redistribute it and/or modify
10*ff8f06eeSShlomo Pongratz  * it under the terms of the GNU General Public License as published by
11*ff8f06eeSShlomo Pongratz  * the Free Software Foundation, either version 2 of the License, or
12*ff8f06eeSShlomo Pongratz  * (at your option) any later version.
13*ff8f06eeSShlomo Pongratz  *
14*ff8f06eeSShlomo Pongratz  * This program is distributed in the hope that it will be useful,
15*ff8f06eeSShlomo Pongratz  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16*ff8f06eeSShlomo Pongratz  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*ff8f06eeSShlomo Pongratz  * GNU General Public License for more details.
18*ff8f06eeSShlomo Pongratz  *
19*ff8f06eeSShlomo Pongratz  * You should have received a copy of the GNU General Public License along
20*ff8f06eeSShlomo Pongratz  * with this program; if not, see <http://www.gnu.org/licenses/>.
21*ff8f06eeSShlomo Pongratz  */
22*ff8f06eeSShlomo Pongratz 
23*ff8f06eeSShlomo Pongratz #ifndef HW_ARM_GICV3_COMMON_H
24*ff8f06eeSShlomo Pongratz #define HW_ARM_GICV3_COMMON_H
25*ff8f06eeSShlomo Pongratz 
26*ff8f06eeSShlomo Pongratz #include "hw/sysbus.h"
27*ff8f06eeSShlomo Pongratz #include "hw/intc/arm_gic_common.h"
28*ff8f06eeSShlomo Pongratz 
29*ff8f06eeSShlomo Pongratz typedef struct GICv3State {
30*ff8f06eeSShlomo Pongratz     /*< private >*/
31*ff8f06eeSShlomo Pongratz     SysBusDevice parent_obj;
32*ff8f06eeSShlomo Pongratz     /*< public >*/
33*ff8f06eeSShlomo Pongratz 
34*ff8f06eeSShlomo Pongratz     qemu_irq *parent_irq;
35*ff8f06eeSShlomo Pongratz     qemu_irq *parent_fiq;
36*ff8f06eeSShlomo Pongratz 
37*ff8f06eeSShlomo Pongratz     MemoryRegion iomem_dist; /* Distributor */
38*ff8f06eeSShlomo Pongratz     MemoryRegion iomem_redist; /* Redistributors */
39*ff8f06eeSShlomo Pongratz 
40*ff8f06eeSShlomo Pongratz     uint32_t num_cpu;
41*ff8f06eeSShlomo Pongratz     uint32_t num_irq;
42*ff8f06eeSShlomo Pongratz     uint32_t revision;
43*ff8f06eeSShlomo Pongratz     bool security_extn;
44*ff8f06eeSShlomo Pongratz 
45*ff8f06eeSShlomo Pongratz     int dev_fd; /* kvm device fd if backed by kvm vgic support */
46*ff8f06eeSShlomo Pongratz } GICv3State;
47*ff8f06eeSShlomo Pongratz 
48*ff8f06eeSShlomo Pongratz #define TYPE_ARM_GICV3_COMMON "arm-gicv3-common"
49*ff8f06eeSShlomo Pongratz #define ARM_GICV3_COMMON(obj) \
50*ff8f06eeSShlomo Pongratz      OBJECT_CHECK(GICv3State, (obj), TYPE_ARM_GICV3_COMMON)
51*ff8f06eeSShlomo Pongratz #define ARM_GICV3_COMMON_CLASS(klass) \
52*ff8f06eeSShlomo Pongratz      OBJECT_CLASS_CHECK(ARMGICv3CommonClass, (klass), TYPE_ARM_GICV3_COMMON)
53*ff8f06eeSShlomo Pongratz #define ARM_GICV3_COMMON_GET_CLASS(obj) \
54*ff8f06eeSShlomo Pongratz      OBJECT_GET_CLASS(ARMGICv3CommonClass, (obj), TYPE_ARM_GICV3_COMMON)
55*ff8f06eeSShlomo Pongratz 
56*ff8f06eeSShlomo Pongratz typedef struct ARMGICv3CommonClass {
57*ff8f06eeSShlomo Pongratz     /*< private >*/
58*ff8f06eeSShlomo Pongratz     SysBusDeviceClass parent_class;
59*ff8f06eeSShlomo Pongratz     /*< public >*/
60*ff8f06eeSShlomo Pongratz 
61*ff8f06eeSShlomo Pongratz     void (*pre_save)(GICv3State *s);
62*ff8f06eeSShlomo Pongratz     void (*post_load)(GICv3State *s);
63*ff8f06eeSShlomo Pongratz } ARMGICv3CommonClass;
64*ff8f06eeSShlomo Pongratz 
65*ff8f06eeSShlomo Pongratz void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler,
66*ff8f06eeSShlomo Pongratz                               const MemoryRegionOps *ops);
67*ff8f06eeSShlomo Pongratz 
68*ff8f06eeSShlomo Pongratz #endif
69