1 /* 2 * Copyright (c) 2019 Red Hat, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2 or later, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 17 #ifndef HW_I386_X86_H 18 #define HW_I386_X86_H 19 20 #include "qemu-common.h" 21 #include "exec/hwaddr.h" 22 #include "qemu/notify.h" 23 24 #include "hw/boards.h" 25 #include "hw/nmi.h" 26 27 typedef struct { 28 /*< private >*/ 29 MachineClass parent; 30 31 /*< public >*/ 32 33 /* TSC rate migration: */ 34 bool save_tsc_khz; 35 /* Enables contiguous-apic-ID mode */ 36 bool compat_apic_id_mode; 37 } X86MachineClass; 38 39 typedef struct { 40 /*< private >*/ 41 MachineState parent; 42 43 /*< public >*/ 44 45 /* Pointers to devices and objects: */ 46 ISADevice *rtc; 47 FWCfgState *fw_cfg; 48 qemu_irq *gsi; 49 GMappedFile *initrd_mapped_file; 50 51 /* Configuration options: */ 52 uint64_t max_ram_below_4g; 53 54 /* RAM information (sizes, addresses, configuration): */ 55 ram_addr_t below_4g_mem_size, above_4g_mem_size; 56 57 /* CPU and apic information: */ 58 bool apic_xrupt_override; 59 unsigned apic_id_limit; 60 uint16_t boot_cpus; 61 unsigned smp_dies; 62 63 OnOffAuto smm; 64 65 /* 66 * Address space used by IOAPIC device. All IOAPIC interrupts 67 * will be translated to MSI messages in the address space. 68 */ 69 AddressSpace *ioapic_as; 70 } X86MachineState; 71 72 #define X86_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 73 #define X86_MACHINE_SMM "smm" 74 75 #define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86") 76 #define X86_MACHINE(obj) \ 77 OBJECT_CHECK(X86MachineState, (obj), TYPE_X86_MACHINE) 78 #define X86_MACHINE_GET_CLASS(obj) \ 79 OBJECT_GET_CLASS(X86MachineClass, obj, TYPE_X86_MACHINE) 80 #define X86_MACHINE_CLASS(class) \ 81 OBJECT_CLASS_CHECK(X86MachineClass, class, TYPE_X86_MACHINE) 82 83 uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms, 84 unsigned int cpu_index); 85 86 void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp); 87 void x86_cpus_init(X86MachineState *pcms, int default_cpu_version); 88 CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms, 89 unsigned cpu_index); 90 int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx); 91 const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms); 92 93 void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw); 94 95 void x86_load_linux(X86MachineState *x86ms, 96 FWCfgState *fw_cfg, 97 int acpi_data_size, 98 bool pvh_enabled, 99 bool linuxboot_dma_enabled); 100 101 bool x86_machine_is_smm_enabled(X86MachineState *x86ms); 102 103 #endif 104