1549e984eSSergio Lopez /* 2549e984eSSergio Lopez * Copyright (c) 2019 Red Hat, Inc. 3549e984eSSergio Lopez * 4549e984eSSergio Lopez * This program is free software; you can redistribute it and/or modify it 5549e984eSSergio Lopez * under the terms and conditions of the GNU General Public License, 6549e984eSSergio Lopez * version 2 or later, as published by the Free Software Foundation. 7549e984eSSergio Lopez * 8549e984eSSergio Lopez * This program is distributed in the hope it will be useful, but WITHOUT 9549e984eSSergio Lopez * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10549e984eSSergio Lopez * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11549e984eSSergio Lopez * more details. 12549e984eSSergio Lopez * 13549e984eSSergio Lopez * You should have received a copy of the GNU General Public License along with 14549e984eSSergio Lopez * this program. If not, see <http://www.gnu.org/licenses/>. 15549e984eSSergio Lopez */ 16549e984eSSergio Lopez 17549e984eSSergio Lopez #ifndef HW_I386_X86_H 18549e984eSSergio Lopez #define HW_I386_X86_H 19549e984eSSergio Lopez 20f0bb276bSPaolo Bonzini #include "qemu-common.h" 21f0bb276bSPaolo Bonzini #include "exec/hwaddr.h" 22f0bb276bSPaolo Bonzini #include "qemu/notify.h" 23f0bb276bSPaolo Bonzini 24549e984eSSergio Lopez #include "hw/boards.h" 25f0bb276bSPaolo Bonzini #include "hw/nmi.h" 26f0bb276bSPaolo Bonzini 27f0bb276bSPaolo Bonzini typedef struct { 28f0bb276bSPaolo Bonzini /*< private >*/ 29f0bb276bSPaolo Bonzini MachineClass parent; 30f0bb276bSPaolo Bonzini 31f0bb276bSPaolo Bonzini /*< public >*/ 32f0bb276bSPaolo Bonzini 33*2f34ebf2SLiam Merwick /* TSC rate migration: */ 34*2f34ebf2SLiam Merwick bool save_tsc_khz; 35f0bb276bSPaolo Bonzini /* Enables contiguous-apic-ID mode */ 36f0bb276bSPaolo Bonzini bool compat_apic_id_mode; 37f0bb276bSPaolo Bonzini } X86MachineClass; 38f0bb276bSPaolo Bonzini 39f0bb276bSPaolo Bonzini typedef struct { 40f0bb276bSPaolo Bonzini /*< private >*/ 41f0bb276bSPaolo Bonzini MachineState parent; 42f0bb276bSPaolo Bonzini 43f0bb276bSPaolo Bonzini /*< public >*/ 44f0bb276bSPaolo Bonzini 45f0bb276bSPaolo Bonzini /* Pointers to devices and objects: */ 46f0bb276bSPaolo Bonzini ISADevice *rtc; 47f0bb276bSPaolo Bonzini FWCfgState *fw_cfg; 48f0bb276bSPaolo Bonzini qemu_irq *gsi; 49f0bb276bSPaolo Bonzini GMappedFile *initrd_mapped_file; 50f0bb276bSPaolo Bonzini 51f0bb276bSPaolo Bonzini /* Configuration options: */ 52f0bb276bSPaolo Bonzini uint64_t max_ram_below_4g; 53f0bb276bSPaolo Bonzini 54f0bb276bSPaolo Bonzini /* RAM information (sizes, addresses, configuration): */ 55f0bb276bSPaolo Bonzini ram_addr_t below_4g_mem_size, above_4g_mem_size; 56f0bb276bSPaolo Bonzini 57f0bb276bSPaolo Bonzini /* CPU and apic information: */ 58f0bb276bSPaolo Bonzini bool apic_xrupt_override; 59f0bb276bSPaolo Bonzini unsigned apic_id_limit; 60f0bb276bSPaolo Bonzini uint16_t boot_cpus; 61f0bb276bSPaolo Bonzini unsigned smp_dies; 62f0bb276bSPaolo Bonzini 63f0bb276bSPaolo Bonzini /* 64f0bb276bSPaolo Bonzini * Address space used by IOAPIC device. All IOAPIC interrupts 65f0bb276bSPaolo Bonzini * will be translated to MSI messages in the address space. 66f0bb276bSPaolo Bonzini */ 67f0bb276bSPaolo Bonzini AddressSpace *ioapic_as; 68f0bb276bSPaolo Bonzini } X86MachineState; 69f0bb276bSPaolo Bonzini 70f0bb276bSPaolo Bonzini #define X86_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 71f0bb276bSPaolo Bonzini 72f0bb276bSPaolo Bonzini #define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86") 73f0bb276bSPaolo Bonzini #define X86_MACHINE(obj) \ 74f0bb276bSPaolo Bonzini OBJECT_CHECK(X86MachineState, (obj), TYPE_X86_MACHINE) 75f0bb276bSPaolo Bonzini #define X86_MACHINE_GET_CLASS(obj) \ 76f0bb276bSPaolo Bonzini OBJECT_GET_CLASS(X86MachineClass, obj, TYPE_X86_MACHINE) 77f0bb276bSPaolo Bonzini #define X86_MACHINE_CLASS(class) \ 78f0bb276bSPaolo Bonzini OBJECT_CLASS_CHECK(X86MachineClass, class, TYPE_X86_MACHINE) 79549e984eSSergio Lopez 80703a548aSSergio Lopez uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms, 81549e984eSSergio Lopez unsigned int cpu_index); 82703a548aSSergio Lopez 83703a548aSSergio Lopez void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp); 84703a548aSSergio Lopez void x86_cpus_init(X86MachineState *pcms, int default_cpu_version); 85549e984eSSergio Lopez CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms, 86549e984eSSergio Lopez unsigned cpu_index); 87549e984eSSergio Lopez int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx); 88549e984eSSergio Lopez const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms); 89549e984eSSergio Lopez 90549e984eSSergio Lopez void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw); 91549e984eSSergio Lopez 92703a548aSSergio Lopez void x86_load_linux(X86MachineState *x86ms, 93703a548aSSergio Lopez FWCfgState *fw_cfg, 94703a548aSSergio Lopez int acpi_data_size, 95703a548aSSergio Lopez bool pvh_enabled, 96703a548aSSergio Lopez bool linuxboot_dma_enabled); 97549e984eSSergio Lopez 98549e984eSSergio Lopez #endif 99