1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "hw/boards.h" 7 #include "hw/block/fdc.h" 8 #include "hw/block/flash.h" 9 #include "hw/i386/x86.h" 10 11 #include "hw/acpi/acpi_dev_interface.h" 12 #include "hw/hotplug.h" 13 #include "qom/object.h" 14 15 #define HPET_INTCAP "hpet-intcap" 16 17 /** 18 * PCMachineState: 19 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 20 * @boot_cpus: number of present VCPUs 21 * @smp_dies: number of dies per one package 22 */ 23 struct PCMachineState { 24 /*< private >*/ 25 X86MachineState parent_obj; 26 27 /* <public> */ 28 29 /* State for other subsystems/APIs: */ 30 Notifier machine_done; 31 32 /* Pointers to devices and objects: */ 33 HotplugHandler *acpi_dev; 34 PCIBus *bus; 35 I2CBus *smbus; 36 PFlashCFI01 *flash[2]; 37 ISADevice *pcspk; 38 39 /* Configuration options: */ 40 uint64_t max_ram_below_4g; 41 OnOffAuto vmport; 42 43 bool acpi_build_enabled; 44 bool smbus_enabled; 45 bool sata_enabled; 46 bool pit_enabled; 47 48 /* NUMA information: */ 49 uint64_t numa_nodes; 50 uint64_t *node_mem; 51 52 /* ACPI Memory hotplug IO base address */ 53 hwaddr memhp_io_base; 54 }; 55 56 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 57 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 58 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" 59 #define PC_MACHINE_VMPORT "vmport" 60 #define PC_MACHINE_SMBUS "smbus" 61 #define PC_MACHINE_SATA "sata" 62 #define PC_MACHINE_PIT "pit" 63 64 /** 65 * PCMachineClass: 66 * 67 * Compat fields: 68 * 69 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by 70 * backend's alignment value if provided 71 * @acpi_data_size: Size of the chunk of memory at the top of RAM 72 * for the BIOS ACPI tables and other BIOS 73 * datastructures. 74 * @gigabyte_align: Make sure that guest addresses aligned at 75 * 1Gbyte boundaries get mapped to host 76 * addresses aligned at 1Gbyte boundaries. This 77 * way we can use 1GByte pages in the host. 78 * 79 */ 80 struct PCMachineClass { 81 /*< private >*/ 82 X86MachineClass parent_class; 83 84 /*< public >*/ 85 86 /* Device configuration: */ 87 bool pci_enabled; 88 bool kvmclock_enabled; 89 const char *default_nic_model; 90 91 /* Compat options: */ 92 93 /* Default CPU model version. See x86_cpu_set_default_version(). */ 94 int default_cpu_version; 95 96 /* ACPI compat: */ 97 bool has_acpi_build; 98 bool rsdp_in_ram; 99 int legacy_acpi_table_size; 100 unsigned acpi_data_size; 101 bool do_not_add_smb_acpi; 102 103 /* SMBIOS compat: */ 104 bool smbios_defaults; 105 bool smbios_legacy_mode; 106 bool smbios_uuid_encoded; 107 108 /* RAM / address space compat: */ 109 bool gigabyte_align; 110 bool has_reserved_memory; 111 bool enforce_aligned_dimm; 112 bool broken_reserved_end; 113 114 /* generate legacy CPU hotplug AML */ 115 bool legacy_cpu_hotplug; 116 117 /* use DMA capable linuxboot option rom */ 118 bool linuxboot_dma_enabled; 119 120 /* use PVH to load kernels that support this feature */ 121 bool pvh_enabled; 122 }; 123 typedef struct PCMachineClass PCMachineClass; 124 125 #define TYPE_PC_MACHINE "generic-pc-machine" 126 #define PC_MACHINE(obj) \ 127 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 128 #define PC_MACHINE_GET_CLASS(obj) \ 129 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 130 #define PC_MACHINE_CLASS(klass) \ 131 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 132 133 /* ioapic.c */ 134 135 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 136 137 /* pc.c */ 138 extern int fd_bootchk; 139 140 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 141 142 void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp); 143 void pc_smp_parse(MachineState *ms, QemuOpts *opts); 144 145 void pc_guest_info_init(PCMachineState *pcms); 146 147 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 148 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 149 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 150 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 151 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 152 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 153 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 154 155 156 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 157 MemoryRegion *pci_address_space); 158 159 void xen_load_linux(PCMachineState *pcms); 160 void pc_memory_init(PCMachineState *pcms, 161 MemoryRegion *system_memory, 162 MemoryRegion *rom_memory, 163 MemoryRegion **ram_memory); 164 uint64_t pc_pci_hole64_start(void); 165 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 166 void pc_basic_device_init(struct PCMachineState *pcms, 167 ISABus *isa_bus, qemu_irq *gsi, 168 ISADevice **rtc_state, 169 bool create_fdctrl, 170 uint32_t hpet_irqs); 171 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 172 void pc_cmos_init(PCMachineState *pcms, 173 BusState *ide0, BusState *ide1, 174 ISADevice *s); 175 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 176 void pc_pci_device_init(PCIBus *pci_bus); 177 178 typedef void (*cpu_set_smm_t)(int smm, void *arg); 179 180 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 181 182 ISADevice *pc_find_fdc0(void); 183 184 /* port92.c */ 185 #define PORT92_A20_LINE "a20" 186 187 #define TYPE_PORT92 "port92" 188 189 /* pc_sysfw.c */ 190 void pc_system_flash_create(PCMachineState *pcms); 191 void pc_system_flash_cleanup_unused(PCMachineState *pcms); 192 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 193 194 /* acpi-build.c */ 195 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, 196 const CPUArchIdList *apic_ids, GArray *entry); 197 198 extern GlobalProperty pc_compat_5_1[]; 199 extern const size_t pc_compat_5_1_len; 200 201 extern GlobalProperty pc_compat_5_0[]; 202 extern const size_t pc_compat_5_0_len; 203 204 extern GlobalProperty pc_compat_4_2[]; 205 extern const size_t pc_compat_4_2_len; 206 207 extern GlobalProperty pc_compat_4_1[]; 208 extern const size_t pc_compat_4_1_len; 209 210 extern GlobalProperty pc_compat_4_0[]; 211 extern const size_t pc_compat_4_0_len; 212 213 extern GlobalProperty pc_compat_3_1[]; 214 extern const size_t pc_compat_3_1_len; 215 216 extern GlobalProperty pc_compat_3_0[]; 217 extern const size_t pc_compat_3_0_len; 218 219 extern GlobalProperty pc_compat_2_12[]; 220 extern const size_t pc_compat_2_12_len; 221 222 extern GlobalProperty pc_compat_2_11[]; 223 extern const size_t pc_compat_2_11_len; 224 225 extern GlobalProperty pc_compat_2_10[]; 226 extern const size_t pc_compat_2_10_len; 227 228 extern GlobalProperty pc_compat_2_9[]; 229 extern const size_t pc_compat_2_9_len; 230 231 extern GlobalProperty pc_compat_2_8[]; 232 extern const size_t pc_compat_2_8_len; 233 234 extern GlobalProperty pc_compat_2_7[]; 235 extern const size_t pc_compat_2_7_len; 236 237 extern GlobalProperty pc_compat_2_6[]; 238 extern const size_t pc_compat_2_6_len; 239 240 extern GlobalProperty pc_compat_2_5[]; 241 extern const size_t pc_compat_2_5_len; 242 243 extern GlobalProperty pc_compat_2_4[]; 244 extern const size_t pc_compat_2_4_len; 245 246 extern GlobalProperty pc_compat_2_3[]; 247 extern const size_t pc_compat_2_3_len; 248 249 extern GlobalProperty pc_compat_2_2[]; 250 extern const size_t pc_compat_2_2_len; 251 252 extern GlobalProperty pc_compat_2_1[]; 253 extern const size_t pc_compat_2_1_len; 254 255 extern GlobalProperty pc_compat_2_0[]; 256 extern const size_t pc_compat_2_0_len; 257 258 extern GlobalProperty pc_compat_1_7[]; 259 extern const size_t pc_compat_1_7_len; 260 261 extern GlobalProperty pc_compat_1_6[]; 262 extern const size_t pc_compat_1_6_len; 263 264 extern GlobalProperty pc_compat_1_5[]; 265 extern const size_t pc_compat_1_5_len; 266 267 extern GlobalProperty pc_compat_1_4[]; 268 extern const size_t pc_compat_1_4_len; 269 270 /* Helper for setting model-id for CPU models that changed model-id 271 * depending on QEMU versions up to QEMU 2.4. 272 */ 273 #define PC_CPU_MODEL_IDS(v) \ 274 { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ 275 { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ 276 { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, }, 277 278 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 279 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 280 { \ 281 MachineClass *mc = MACHINE_CLASS(oc); \ 282 optsfn(mc); \ 283 mc->init = initfn; \ 284 } \ 285 static const TypeInfo pc_machine_type_##suffix = { \ 286 .name = namestr TYPE_MACHINE_SUFFIX, \ 287 .parent = TYPE_PC_MACHINE, \ 288 .class_init = pc_machine_##suffix##_class_init, \ 289 }; \ 290 static void pc_machine_init_##suffix(void) \ 291 { \ 292 type_register(&pc_machine_type_##suffix); \ 293 } \ 294 type_init(pc_machine_init_##suffix) 295 296 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); 297 #endif 298