1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu/notify.h" 5 #include "qapi/qapi-types-common.h" 6 #include "qemu/uuid.h" 7 #include "hw/boards.h" 8 #include "hw/block/fdc.h" 9 #include "hw/block/flash.h" 10 #include "hw/i386/x86.h" 11 12 #include "hw/hotplug.h" 13 #include "qom/object.h" 14 #include "hw/i386/sgx-epc.h" 15 #include "hw/cxl/cxl.h" 16 17 #define MAX_IDE_BUS 2 18 19 /** 20 * PCMachineState: 21 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 22 * @boot_cpus: number of present VCPUs 23 */ 24 typedef struct PCMachineState { 25 /*< private >*/ 26 X86MachineState parent_obj; 27 28 /* <public> */ 29 30 /* State for other subsystems/APIs: */ 31 Notifier machine_done; 32 33 /* Pointers to devices and objects: */ 34 PCIBus *pcibus; 35 I2CBus *smbus; 36 PFlashCFI01 *flash[2]; 37 ISADevice *pcspk; 38 DeviceState *iommu; 39 BusState *idebus[MAX_IDE_BUS]; 40 41 /* Configuration options: */ 42 uint64_t max_ram_below_4g; 43 OnOffAuto vmport; 44 SmbiosEntryPointType smbios_entry_point_type; 45 const char *south_bridge; 46 47 bool acpi_build_enabled; 48 bool smbus_enabled; 49 bool sata_enabled; 50 bool hpet_enabled; 51 bool i8042_enabled; 52 bool default_bus_bypass_iommu; 53 bool fd_bootchk; 54 uint64_t max_fw_size; 55 56 /* ACPI Memory hotplug IO base address */ 57 hwaddr memhp_io_base; 58 59 SGXEPCState sgx_epc; 60 CXLState cxl_devices_state; 61 } PCMachineState; 62 63 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 64 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 65 #define PC_MACHINE_VMPORT "vmport" 66 #define PC_MACHINE_SMBUS "smbus" 67 #define PC_MACHINE_SATA "sata" 68 #define PC_MACHINE_I8042 "i8042" 69 #define PC_MACHINE_MAX_FW_SIZE "max-fw-size" 70 #define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type" 71 72 /** 73 * PCMachineClass: 74 * 75 * Compat fields: 76 * 77 * @acpi_data_size: Size of the chunk of memory at the top of RAM 78 * for the BIOS ACPI tables and other BIOS 79 * datastructures. 80 * @gigabyte_align: Make sure that guest addresses aligned at 81 * 1Gbyte boundaries get mapped to host 82 * addresses aligned at 1Gbyte boundaries. This 83 * way we can use 1GByte pages in the host. 84 * 85 */ 86 struct PCMachineClass { 87 /*< private >*/ 88 X86MachineClass parent_class; 89 90 /*< public >*/ 91 92 /* Device configuration: */ 93 bool pci_enabled; 94 const char *default_south_bridge; 95 96 /* Compat options: */ 97 98 /* Default CPU model version. See x86_cpu_set_default_version(). */ 99 int default_cpu_version; 100 101 /* ACPI compat: */ 102 bool has_acpi_build; 103 unsigned acpi_data_size; 104 int pci_root_uid; 105 106 /* SMBIOS compat: */ 107 bool smbios_defaults; 108 bool smbios_legacy_mode; 109 SmbiosEntryPointType default_smbios_ep_type; 110 111 /* RAM / address space compat: */ 112 bool gigabyte_align; 113 bool has_reserved_memory; 114 bool broken_reserved_end; 115 bool enforce_amd_1tb_hole; 116 bool isa_bios_alias; 117 118 /* generate legacy CPU hotplug AML */ 119 bool legacy_cpu_hotplug; 120 121 /* use PVH to load kernels that support this feature */ 122 bool pvh_enabled; 123 124 /* create kvmclock device even when KVM PV features are not exposed */ 125 bool kvmclock_create_always; 126 127 /* 128 * whether the machine type implements broken 32-bit address space bound 129 * check for memory. 130 */ 131 bool broken_32bit_mem_addr_check; 132 }; 133 134 #define TYPE_PC_MACHINE "generic-pc-machine" 135 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) 136 137 /* ioapic.c */ 138 139 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); 140 141 /* pc.c */ 142 143 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 144 145 #define PCI_HOST_PROP_RAM_MEM "ram-mem" 146 #define PCI_HOST_PROP_PCI_MEM "pci-mem" 147 #define PCI_HOST_PROP_SYSTEM_MEM "system-mem" 148 #define PCI_HOST_PROP_IO_MEM "io-mem" 149 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 150 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 151 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 152 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 153 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 154 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" 155 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" 156 #define PCI_HOST_PROP_SMM_RANGES "smm-ranges" 157 158 typedef enum { 159 SEV_DESC_TYPE_UNDEF, 160 /* The section contains the region that must be validated by the VMM. */ 161 SEV_DESC_TYPE_SNP_SEC_MEM, 162 /* The section contains the SNP secrets page */ 163 SEV_DESC_TYPE_SNP_SECRETS, 164 /* The section contains address that can be used as a CPUID page */ 165 SEV_DESC_TYPE_CPUID, 166 /* The section contains the region for kernel hashes for measured direct boot */ 167 SEV_DESC_TYPE_SNP_KERNEL_HASHES = 0x10, 168 169 } ovmf_sev_metadata_desc_type; 170 171 typedef struct __attribute__((__packed__)) OvmfSevMetadataDesc { 172 uint32_t base; 173 uint32_t len; 174 ovmf_sev_metadata_desc_type type; 175 } OvmfSevMetadataDesc; 176 177 typedef struct __attribute__((__packed__)) OvmfSevMetadata { 178 uint8_t signature[4]; 179 uint32_t len; 180 uint32_t version; 181 uint32_t num_desc; 182 OvmfSevMetadataDesc descs[]; 183 } OvmfSevMetadata; 184 185 OvmfSevMetadata *pc_system_get_ovmf_sev_metadata_ptr(void); 186 187 void pc_pci_as_mapping_init(MemoryRegion *system_memory, 188 MemoryRegion *pci_address_space); 189 190 void xen_load_linux(PCMachineState *pcms); 191 void pc_memory_init(PCMachineState *pcms, 192 MemoryRegion *system_memory, 193 MemoryRegion *rom_memory, 194 uint64_t pci_hole64_size); 195 uint64_t pc_pci_hole64_start(void); 196 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 197 void pc_basic_device_init(struct PCMachineState *pcms, 198 ISABus *isa_bus, qemu_irq *gsi, 199 ISADevice *rtc_state, 200 bool create_fdctrl, 201 uint32_t hpet_irqs); 202 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); 203 204 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); 205 206 /* port92.c */ 207 #define PORT92_A20_LINE "a20" 208 209 #define TYPE_PORT92 "port92" 210 211 /* pc_sysfw.c */ 212 void pc_system_flash_create(PCMachineState *pcms); 213 void pc_system_flash_cleanup_unused(PCMachineState *pcms); 214 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); 215 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, 216 int *data_len); 217 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size); 218 219 /* sgx.c */ 220 void pc_machine_init_sgx_epc(PCMachineState *pcms); 221 222 extern GlobalProperty pc_compat_9_0[]; 223 extern const size_t pc_compat_9_0_len; 224 225 extern GlobalProperty pc_compat_8_2[]; 226 extern const size_t pc_compat_8_2_len; 227 228 extern GlobalProperty pc_compat_8_1[]; 229 extern const size_t pc_compat_8_1_len; 230 231 extern GlobalProperty pc_compat_8_0[]; 232 extern const size_t pc_compat_8_0_len; 233 234 extern GlobalProperty pc_compat_7_2[]; 235 extern const size_t pc_compat_7_2_len; 236 237 extern GlobalProperty pc_compat_7_1[]; 238 extern const size_t pc_compat_7_1_len; 239 240 extern GlobalProperty pc_compat_7_0[]; 241 extern const size_t pc_compat_7_0_len; 242 243 extern GlobalProperty pc_compat_6_2[]; 244 extern const size_t pc_compat_6_2_len; 245 246 extern GlobalProperty pc_compat_6_1[]; 247 extern const size_t pc_compat_6_1_len; 248 249 extern GlobalProperty pc_compat_6_0[]; 250 extern const size_t pc_compat_6_0_len; 251 252 extern GlobalProperty pc_compat_5_2[]; 253 extern const size_t pc_compat_5_2_len; 254 255 extern GlobalProperty pc_compat_5_1[]; 256 extern const size_t pc_compat_5_1_len; 257 258 extern GlobalProperty pc_compat_5_0[]; 259 extern const size_t pc_compat_5_0_len; 260 261 extern GlobalProperty pc_compat_4_2[]; 262 extern const size_t pc_compat_4_2_len; 263 264 extern GlobalProperty pc_compat_4_1[]; 265 extern const size_t pc_compat_4_1_len; 266 267 extern GlobalProperty pc_compat_4_0[]; 268 extern const size_t pc_compat_4_0_len; 269 270 extern GlobalProperty pc_compat_3_1[]; 271 extern const size_t pc_compat_3_1_len; 272 273 extern GlobalProperty pc_compat_3_0[]; 274 extern const size_t pc_compat_3_0_len; 275 276 extern GlobalProperty pc_compat_2_12[]; 277 extern const size_t pc_compat_2_12_len; 278 279 extern GlobalProperty pc_compat_2_11[]; 280 extern const size_t pc_compat_2_11_len; 281 282 extern GlobalProperty pc_compat_2_10[]; 283 extern const size_t pc_compat_2_10_len; 284 285 extern GlobalProperty pc_compat_2_9[]; 286 extern const size_t pc_compat_2_9_len; 287 288 extern GlobalProperty pc_compat_2_8[]; 289 extern const size_t pc_compat_2_8_len; 290 291 extern GlobalProperty pc_compat_2_7[]; 292 extern const size_t pc_compat_2_7_len; 293 294 extern GlobalProperty pc_compat_2_6[]; 295 extern const size_t pc_compat_2_6_len; 296 297 extern GlobalProperty pc_compat_2_5[]; 298 extern const size_t pc_compat_2_5_len; 299 300 extern GlobalProperty pc_compat_2_4[]; 301 extern const size_t pc_compat_2_4_len; 302 303 extern GlobalProperty pc_compat_2_3[]; 304 extern const size_t pc_compat_2_3_len; 305 306 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ 307 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ 308 { \ 309 MachineClass *mc = MACHINE_CLASS(oc); \ 310 optsfn(mc); \ 311 mc->init = initfn; \ 312 } \ 313 static const TypeInfo pc_machine_type_##suffix = { \ 314 .name = namestr TYPE_MACHINE_SUFFIX, \ 315 .parent = TYPE_PC_MACHINE, \ 316 .class_init = pc_machine_##suffix##_class_init, \ 317 }; \ 318 static void pc_machine_init_##suffix(void) \ 319 { \ 320 type_register(&pc_machine_type_##suffix); \ 321 } \ 322 type_init(pc_machine_init_##suffix) 323 324 #endif 325