1 #ifndef HW_PC_H 2 #define HW_PC_H 3 4 #include "qemu-common.h" 5 #include "exec/memory.h" 6 #include "hw/boards.h" 7 #include "hw/isa/isa.h" 8 #include "hw/block/fdc.h" 9 #include "net/net.h" 10 #include "hw/i386/ioapic.h" 11 12 #include "qemu/range.h" 13 #include "qemu/bitmap.h" 14 #include "sysemu/sysemu.h" 15 #include "hw/pci/pci.h" 16 #include "hw/boards.h" 17 18 #define HPET_INTCAP "hpet-intcap" 19 20 /** 21 * PCMachineState: 22 * @hotplug_memory_base: address in guest RAM address space where hotplug memory 23 * address space begins. 24 * @hotplug_memory: hotplug memory addess space container 25 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling 26 */ 27 struct PCMachineState { 28 /*< private >*/ 29 MachineState parent_obj; 30 31 /* <public> */ 32 ram_addr_t hotplug_memory_base; 33 MemoryRegion hotplug_memory; 34 35 HotplugHandler *acpi_dev; 36 37 uint64_t max_ram_below_4g; 38 bool vmport; 39 }; 40 41 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" 42 #define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size" 43 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" 44 #define PC_MACHINE_VMPORT "vmport" 45 46 /** 47 * PCMachineClass: 48 * @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler 49 */ 50 struct PCMachineClass { 51 /*< private >*/ 52 MachineClass parent_class; 53 54 /*< public >*/ 55 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, 56 DeviceState *dev); 57 }; 58 59 typedef struct PCMachineState PCMachineState; 60 typedef struct PCMachineClass PCMachineClass; 61 62 #define TYPE_PC_MACHINE "generic-pc-machine" 63 #define PC_MACHINE(obj) \ 64 OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE) 65 #define PC_MACHINE_GET_CLASS(obj) \ 66 OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE) 67 #define PC_MACHINE_CLASS(klass) \ 68 OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE) 69 70 void qemu_register_pc_machine(QEMUMachine *m); 71 72 /* PC-style peripherals (also used by other machines). */ 73 74 typedef struct PcPciInfo { 75 Range w32; 76 Range w64; 77 } PcPciInfo; 78 79 #define ACPI_PM_PROP_S3_DISABLED "disable_s3" 80 #define ACPI_PM_PROP_S4_DISABLED "disable_s4" 81 #define ACPI_PM_PROP_S4_VAL "s4_val" 82 #define ACPI_PM_PROP_SCI_INT "sci_int" 83 #define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd" 84 #define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd" 85 #define ACPI_PM_PROP_PM_IO_BASE "pm_io_base" 86 #define ACPI_PM_PROP_GPE0_BLK "gpe0_blk" 87 #define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len" 88 89 struct PcGuestInfo { 90 bool isapc_ram_fw; 91 hwaddr ram_size, ram_size_below_4g; 92 unsigned apic_id_limit; 93 bool apic_xrupt_override; 94 uint64_t numa_nodes; 95 uint64_t *node_mem; 96 uint64_t *node_cpu; 97 FWCfgState *fw_cfg; 98 int legacy_acpi_table_size; 99 bool has_acpi_build; 100 bool has_reserved_memory; 101 }; 102 103 /* parallel.c */ 104 static inline bool parallel_init(ISABus *bus, int index, CharDriverState *chr) 105 { 106 DeviceState *dev; 107 ISADevice *isadev; 108 109 isadev = isa_try_create(bus, "isa-parallel"); 110 if (!isadev) { 111 return false; 112 } 113 dev = DEVICE(isadev); 114 qdev_prop_set_uint32(dev, "index", index); 115 qdev_prop_set_chr(dev, "chardev", chr); 116 if (qdev_init(dev) < 0) { 117 return false; 118 } 119 return true; 120 } 121 122 bool parallel_mm_init(MemoryRegion *address_space, 123 hwaddr base, int it_shift, qemu_irq irq, 124 CharDriverState *chr); 125 126 /* i8259.c */ 127 128 extern DeviceState *isa_pic; 129 qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq); 130 qemu_irq *kvm_i8259_init(ISABus *bus); 131 int pic_read_irq(DeviceState *d); 132 int pic_get_output(DeviceState *d); 133 void pic_info(Monitor *mon, const QDict *qdict); 134 void irq_info(Monitor *mon, const QDict *qdict); 135 136 /* Global System Interrupts */ 137 138 #define GSI_NUM_PINS IOAPIC_NUM_PINS 139 140 typedef struct GSIState { 141 qemu_irq i8259_irq[ISA_NUM_IRQS]; 142 qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; 143 } GSIState; 144 145 void gsi_handler(void *opaque, int n, int level); 146 147 /* vmport.c */ 148 typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address); 149 150 static inline void vmport_init(ISABus *bus) 151 { 152 isa_create_simple(bus, "vmport"); 153 } 154 155 void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque); 156 void vmmouse_get_data(uint32_t *data); 157 void vmmouse_set_data(const uint32_t *data); 158 159 /* pckbd.c */ 160 161 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base); 162 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, 163 MemoryRegion *region, ram_addr_t size, 164 hwaddr mask); 165 void i8042_isa_mouse_fake_event(void *opaque); 166 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out); 167 168 /* pc.c */ 169 extern int fd_bootchk; 170 171 void pc_register_ferr_irq(qemu_irq irq); 172 void pc_acpi_smi_interrupt(void *opaque, int irq, int level); 173 174 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge); 175 void pc_hot_add_cpu(const int64_t id, Error **errp); 176 void pc_acpi_init(const char *default_dsdt); 177 178 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size, 179 ram_addr_t above_4g_mem_size); 180 181 void pc_set_legacy_acpi_data_size(void); 182 183 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" 184 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" 185 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" 186 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" 187 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" 188 #define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL) 189 190 191 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, 192 MemoryRegion *pci_address_space); 193 194 FWCfgState *xen_load_linux(const char *kernel_filename, 195 const char *kernel_cmdline, 196 const char *initrd_filename, 197 ram_addr_t below_4g_mem_size, 198 PcGuestInfo *guest_info); 199 FWCfgState *pc_memory_init(MachineState *machine, 200 MemoryRegion *system_memory, 201 ram_addr_t below_4g_mem_size, 202 ram_addr_t above_4g_mem_size, 203 MemoryRegion *rom_memory, 204 MemoryRegion **ram_memory, 205 PcGuestInfo *guest_info); 206 qemu_irq *pc_allocate_cpu_irq(void); 207 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); 208 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi, 209 ISADevice **rtc_state, 210 ISADevice **floppy, 211 bool no_vmport, 212 uint32 hpet_irqs); 213 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); 214 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, 215 const char *boot_device, 216 ISADevice *floppy, BusState *ide0, BusState *ide1, 217 ISADevice *s); 218 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus); 219 void pc_pci_device_init(PCIBus *pci_bus); 220 221 typedef void (*cpu_set_smm_t)(int smm, void *arg); 222 void cpu_smm_register(cpu_set_smm_t callback, void *arg); 223 224 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); 225 226 /* acpi_piix.c */ 227 228 I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 229 qemu_irq sci_irq, qemu_irq smi_irq, 230 int kvm_enabled, FWCfgState *fw_cfg, 231 DeviceState **piix4_pm); 232 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr); 233 234 /* hpet.c */ 235 extern int no_hpet; 236 237 /* piix_pci.c */ 238 struct PCII440FXState; 239 typedef struct PCII440FXState PCII440FXState; 240 241 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, 242 ISABus **isa_bus, qemu_irq *pic, 243 MemoryRegion *address_space_mem, 244 MemoryRegion *address_space_io, 245 ram_addr_t ram_size, 246 ram_addr_t below_4g_mem_size, 247 ram_addr_t above_4g_mem_size, 248 MemoryRegion *pci_memory, 249 MemoryRegion *ram_memory); 250 251 PCIBus *find_i440fx(void); 252 /* piix4.c */ 253 extern PCIDevice *piix4_dev; 254 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn); 255 256 /* vga.c */ 257 enum vga_retrace_method { 258 VGA_RETRACE_DUMB, 259 VGA_RETRACE_PRECISE 260 }; 261 262 extern enum vga_retrace_method vga_retrace_method; 263 264 int isa_vga_mm_init(hwaddr vram_base, 265 hwaddr ctrl_base, int it_shift, 266 MemoryRegion *address_space); 267 268 /* ne2000.c */ 269 static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd) 270 { 271 DeviceState *dev; 272 ISADevice *isadev; 273 274 qemu_check_nic_model(nd, "ne2k_isa"); 275 276 isadev = isa_try_create(bus, "ne2k_isa"); 277 if (!isadev) { 278 return false; 279 } 280 dev = DEVICE(isadev); 281 qdev_prop_set_uint32(dev, "iobase", base); 282 qdev_prop_set_uint32(dev, "irq", irq); 283 qdev_set_nic_properties(dev, nd); 284 qdev_init_nofail(dev); 285 return true; 286 } 287 288 /* pc_sysfw.c */ 289 void pc_system_firmware_init(MemoryRegion *rom_memory, 290 bool isapc_ram_fw); 291 292 /* pvpanic.c */ 293 uint16_t pvpanic_port(void); 294 295 /* e820 types */ 296 #define E820_RAM 1 297 #define E820_RESERVED 2 298 #define E820_ACPI 3 299 #define E820_NVS 4 300 #define E820_UNUSABLE 5 301 302 int e820_add_entry(uint64_t, uint64_t, uint32_t); 303 int e820_get_num_entries(void); 304 bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); 305 306 #define PC_COMPAT_2_1 \ 307 {\ 308 .driver = "intel-hda",\ 309 .property = "old_msi_addr",\ 310 .value = "on",\ 311 },{\ 312 .driver = "VGA",\ 313 .property = "qemu-extended-regs",\ 314 .value = "off",\ 315 },{\ 316 .driver = "secondary-vga",\ 317 .property = "qemu-extended-regs",\ 318 .value = "off",\ 319 },{\ 320 .driver = "usb-mouse",\ 321 .property = "usb_version",\ 322 .value = stringify(1),\ 323 },{\ 324 .driver = "usb-kbd",\ 325 .property = "usb_version",\ 326 .value = stringify(1),\ 327 } 328 329 #define PC_COMPAT_2_0 \ 330 PC_COMPAT_2_1, \ 331 {\ 332 .driver = "virtio-scsi-pci",\ 333 .property = "any_layout",\ 334 .value = "off",\ 335 },{\ 336 .driver = "PIIX4_PM",\ 337 .property = "memory-hotplug-support",\ 338 .value = "off",\ 339 },\ 340 {\ 341 .driver = "apic",\ 342 .property = "version",\ 343 .value = stringify(0x11),\ 344 },\ 345 {\ 346 .driver = "nec-usb-xhci",\ 347 .property = "superspeed-ports-first",\ 348 .value = "off",\ 349 },\ 350 {\ 351 .driver = "nec-usb-xhci",\ 352 .property = "force-pcie-endcap",\ 353 .value = "on",\ 354 },\ 355 {\ 356 .driver = "pci-serial",\ 357 .property = "prog_if",\ 358 .value = stringify(0),\ 359 },\ 360 {\ 361 .driver = "pci-serial-2x",\ 362 .property = "prog_if",\ 363 .value = stringify(0),\ 364 },\ 365 {\ 366 .driver = "pci-serial-4x",\ 367 .property = "prog_if",\ 368 .value = stringify(0),\ 369 },\ 370 {\ 371 .driver = "virtio-net-pci",\ 372 .property = "guest_announce",\ 373 .value = "off",\ 374 },\ 375 {\ 376 .driver = "ICH9-LPC",\ 377 .property = "memory-hotplug-support",\ 378 .value = "off",\ 379 },{\ 380 .driver = "xio3130-downstream",\ 381 .property = COMPAT_PROP_PCP,\ 382 .value = "off",\ 383 },{\ 384 .driver = "ioh3420",\ 385 .property = COMPAT_PROP_PCP,\ 386 .value = "off",\ 387 } 388 389 #define PC_COMPAT_1_7 \ 390 PC_COMPAT_2_0, \ 391 {\ 392 .driver = TYPE_USB_DEVICE,\ 393 .property = "msos-desc",\ 394 .value = "no",\ 395 },\ 396 {\ 397 .driver = "PIIX4_PM",\ 398 .property = "acpi-pci-hotplug-with-bridge-support",\ 399 .value = "off",\ 400 },\ 401 {\ 402 .driver = "hpet",\ 403 .property = HPET_INTCAP,\ 404 .value = stringify(4),\ 405 } 406 407 #define PC_COMPAT_1_6 \ 408 PC_COMPAT_1_7, \ 409 {\ 410 .driver = "e1000",\ 411 .property = "mitigation",\ 412 .value = "off",\ 413 },{\ 414 .driver = "qemu64-" TYPE_X86_CPU,\ 415 .property = "model",\ 416 .value = stringify(2),\ 417 },{\ 418 .driver = "qemu32-" TYPE_X86_CPU,\ 419 .property = "model",\ 420 .value = stringify(3),\ 421 },{\ 422 .driver = "i440FX-pcihost",\ 423 .property = "short_root_bus",\ 424 .value = stringify(1),\ 425 },{\ 426 .driver = "q35-pcihost",\ 427 .property = "short_root_bus",\ 428 .value = stringify(1),\ 429 } 430 431 #define PC_COMPAT_1_5 \ 432 PC_COMPAT_1_6, \ 433 {\ 434 .driver = "Conroe-" TYPE_X86_CPU,\ 435 .property = "model",\ 436 .value = stringify(2),\ 437 },{\ 438 .driver = "Conroe-" TYPE_X86_CPU,\ 439 .property = "level",\ 440 .value = stringify(2),\ 441 },{\ 442 .driver = "Penryn-" TYPE_X86_CPU,\ 443 .property = "model",\ 444 .value = stringify(2),\ 445 },{\ 446 .driver = "Penryn-" TYPE_X86_CPU,\ 447 .property = "level",\ 448 .value = stringify(2),\ 449 },{\ 450 .driver = "Nehalem-" TYPE_X86_CPU,\ 451 .property = "model",\ 452 .value = stringify(2),\ 453 },{\ 454 .driver = "Nehalem-" TYPE_X86_CPU,\ 455 .property = "level",\ 456 .value = stringify(2),\ 457 },{\ 458 .driver = "virtio-net-pci",\ 459 .property = "any_layout",\ 460 .value = "off",\ 461 },{\ 462 .driver = TYPE_X86_CPU,\ 463 .property = "pmu",\ 464 .value = "on",\ 465 },{\ 466 .driver = "i440FX-pcihost",\ 467 .property = "short_root_bus",\ 468 .value = stringify(0),\ 469 },{\ 470 .driver = "q35-pcihost",\ 471 .property = "short_root_bus",\ 472 .value = stringify(0),\ 473 } 474 475 #define PC_COMPAT_1_4 \ 476 PC_COMPAT_1_5, \ 477 {\ 478 .driver = "scsi-hd",\ 479 .property = "discard_granularity",\ 480 .value = stringify(0),\ 481 },{\ 482 .driver = "scsi-cd",\ 483 .property = "discard_granularity",\ 484 .value = stringify(0),\ 485 },{\ 486 .driver = "scsi-disk",\ 487 .property = "discard_granularity",\ 488 .value = stringify(0),\ 489 },{\ 490 .driver = "ide-hd",\ 491 .property = "discard_granularity",\ 492 .value = stringify(0),\ 493 },{\ 494 .driver = "ide-cd",\ 495 .property = "discard_granularity",\ 496 .value = stringify(0),\ 497 },{\ 498 .driver = "ide-drive",\ 499 .property = "discard_granularity",\ 500 .value = stringify(0),\ 501 },{\ 502 .driver = "virtio-blk-pci",\ 503 .property = "discard_granularity",\ 504 .value = stringify(0),\ 505 },{\ 506 .driver = "virtio-serial-pci",\ 507 .property = "vectors",\ 508 /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\ 509 .value = stringify(0xFFFFFFFF),\ 510 },{ \ 511 .driver = "virtio-net-pci", \ 512 .property = "ctrl_guest_offloads", \ 513 .value = "off", \ 514 },{\ 515 .driver = "e1000",\ 516 .property = "romfile",\ 517 .value = "pxe-e1000.rom",\ 518 },{\ 519 .driver = "ne2k_pci",\ 520 .property = "romfile",\ 521 .value = "pxe-ne2k_pci.rom",\ 522 },{\ 523 .driver = "pcnet",\ 524 .property = "romfile",\ 525 .value = "pxe-pcnet.rom",\ 526 },{\ 527 .driver = "rtl8139",\ 528 .property = "romfile",\ 529 .value = "pxe-rtl8139.rom",\ 530 },{\ 531 .driver = "virtio-net-pci",\ 532 .property = "romfile",\ 533 .value = "pxe-virtio.rom",\ 534 },{\ 535 .driver = "486-" TYPE_X86_CPU,\ 536 .property = "model",\ 537 .value = stringify(0),\ 538 } 539 540 #define PC_COMMON_MACHINE_OPTIONS \ 541 .default_boot_order = "cad" 542 543 #define PC_DEFAULT_MACHINE_OPTIONS \ 544 PC_COMMON_MACHINE_OPTIONS, \ 545 .hot_add_cpu = pc_hot_add_cpu, \ 546 .max_cpus = 255 547 548 #endif 549