xref: /qemu/include/hw/i386/apic.h (revision b2101358e591c9f0a93739dd3aee72935a79af80)
1aa28b9bfSBlue Swirl #ifndef APIC_H
2aa28b9bfSBlue Swirl #define APIC_H
3aa28b9bfSBlue Swirl 
492a16d7aSBlue Swirl 
5cf6d64bfSBlue Swirl /* apic.c */
61f6f408cSJan Kiszka void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode,
71f6f408cSJan Kiszka                       uint8_t vector_num, uint8_t trigger_mode);
892a16d7aSBlue Swirl int apic_accept_pic_intr(DeviceState *s);
992a16d7aSBlue Swirl void apic_deliver_pic_intr(DeviceState *s, int level);
1002c09195SJan Kiszka void apic_deliver_nmi(DeviceState *d);
1192a16d7aSBlue Swirl int apic_get_interrupt(DeviceState *s);
1292a16d7aSBlue Swirl void cpu_set_apic_base(DeviceState *s, uint64_t val);
1392a16d7aSBlue Swirl uint64_t cpu_get_apic_base(DeviceState *s);
1492a16d7aSBlue Swirl void cpu_set_apic_tpr(DeviceState *s, uint8_t val);
1592a16d7aSBlue Swirl uint8_t cpu_get_apic_tpr(DeviceState *s);
1692a16d7aSBlue Swirl void apic_init_reset(DeviceState *s);
1792a16d7aSBlue Swirl void apic_sipi(DeviceState *s);
185d62c43aSJan Kiszka void apic_poll_irq(DeviceState *d);
199cb11fd7SNadav Amit void apic_designate_bsp(DeviceState *d, bool bsp);
202cb9f06eSSergio Andres Gomez Del Real int apic_get_highest_priority_irr(DeviceState *dev);
21*b2101358SBui Quang Minh int apic_msr_read(int index, uint64_t *val);
22*b2101358SBui Quang Minh int apic_msr_write(int index, uint64_t val);
23*b2101358SBui Quang Minh bool is_x2apic_mode(DeviceState *d);
24aa28b9bfSBlue Swirl 
250e26b7b8SBlue Swirl /* pc.c */
2692a16d7aSBlue Swirl DeviceState *cpu_get_current_apic(void);
27aa28b9bfSBlue Swirl 
28aa28b9bfSBlue Swirl #endif
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