1aa28b9bfSBlue Swirl #ifndef APIC_H 2aa28b9bfSBlue Swirl #define APIC_H 3aa28b9bfSBlue Swirl 492a16d7aSBlue Swirl #include "qemu-common.h" 592a16d7aSBlue Swirl 6cf6d64bfSBlue Swirl /* apic.c */ 71f6f408cSJan Kiszka void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, 81f6f408cSJan Kiszka uint8_t vector_num, uint8_t trigger_mode); 992a16d7aSBlue Swirl int apic_accept_pic_intr(DeviceState *s); 1092a16d7aSBlue Swirl void apic_deliver_pic_intr(DeviceState *s, int level); 1102c09195SJan Kiszka void apic_deliver_nmi(DeviceState *d); 1292a16d7aSBlue Swirl int apic_get_interrupt(DeviceState *s); 13aa28b9bfSBlue Swirl void apic_reset_irq_delivered(void); 14aa28b9bfSBlue Swirl int apic_get_irq_delivered(void); 1592a16d7aSBlue Swirl void cpu_set_apic_base(DeviceState *s, uint64_t val); 1692a16d7aSBlue Swirl uint64_t cpu_get_apic_base(DeviceState *s); 1792a16d7aSBlue Swirl void cpu_set_apic_tpr(DeviceState *s, uint8_t val); 1892a16d7aSBlue Swirl uint8_t cpu_get_apic_tpr(DeviceState *s); 1992a16d7aSBlue Swirl void apic_init_reset(DeviceState *s); 2092a16d7aSBlue Swirl void apic_sipi(DeviceState *s); 21d362e757SJan Kiszka void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip, 22d362e757SJan Kiszka TPRAccess access); 23*5d62c43aSJan Kiszka void apic_poll_irq(DeviceState *d); 24aa28b9bfSBlue Swirl 250e26b7b8SBlue Swirl /* pc.c */ 264a8fa5dcSAndreas Färber int cpu_is_bsp(CPUX86State *env); 2792a16d7aSBlue Swirl DeviceState *cpu_get_current_apic(void); 28aa28b9bfSBlue Swirl 29aa28b9bfSBlue Swirl #endif 30