13fffc223Sths /* 2*93198b6cSCorey Minyard * QEMU SMBus device (slave) API 33fffc223Sths * 43fffc223Sths * Copyright (c) 2007 Arastra, Inc. 53fffc223Sths * 63fffc223Sths * Permission is hereby granted, free of charge, to any person obtaining a copy 73fffc223Sths * of this software and associated documentation files (the "Software"), to deal 83fffc223Sths * in the Software without restriction, including without limitation the rights 93fffc223Sths * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 103fffc223Sths * copies of the Software, and to permit persons to whom the Software is 113fffc223Sths * furnished to do so, subject to the following conditions: 123fffc223Sths * 133fffc223Sths * The above copyright notice and this permission notice shall be included in 143fffc223Sths * all copies or substantial portions of the Software. 153fffc223Sths * 163fffc223Sths * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 173fffc223Sths * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 183fffc223Sths * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 193fffc223Sths * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 203fffc223Sths * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 213fffc223Sths * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 223fffc223Sths * THE SOFTWARE. 233fffc223Sths */ 243fffc223Sths 25*93198b6cSCorey Minyard #ifndef HW_SMBUS_SLAVE_H 26*93198b6cSCorey Minyard #define HW_SMBUS_SLAVE_H 27*93198b6cSCorey Minyard 280d09e41aSPaolo Bonzini #include "hw/i2c/i2c.h" 293fffc223Sths 30b5ea9327SAnthony Liguori #define TYPE_SMBUS_DEVICE "smbus-device" 31b5ea9327SAnthony Liguori #define SMBUS_DEVICE(obj) \ 32b5ea9327SAnthony Liguori OBJECT_CHECK(SMBusDevice, (obj), TYPE_SMBUS_DEVICE) 33b5ea9327SAnthony Liguori #define SMBUS_DEVICE_CLASS(klass) \ 34b5ea9327SAnthony Liguori OBJECT_CLASS_CHECK(SMBusDeviceClass, (klass), TYPE_SMBUS_DEVICE) 35b5ea9327SAnthony Liguori #define SMBUS_DEVICE_GET_CLASS(obj) \ 36b5ea9327SAnthony Liguori OBJECT_GET_CLASS(SMBusDeviceClass, (obj), TYPE_SMBUS_DEVICE) 370ff596d0Spbrook 38d183b00eSPhilippe Mathieu-Daudé typedef struct SMBusDevice SMBusDevice; 39d183b00eSPhilippe Mathieu-Daudé 40b5ea9327SAnthony Liguori typedef struct SMBusDeviceClass 41b5ea9327SAnthony Liguori { 42b5ea9327SAnthony Liguori I2CSlaveClass parent_class; 433fffc223Sths void (*quick_cmd)(SMBusDevice *dev, uint8_t read); 443fffc223Sths void (*send_byte)(SMBusDevice *dev, uint8_t val); 453fffc223Sths uint8_t (*receive_byte)(SMBusDevice *dev); 460ff596d0Spbrook /* We can't distinguish between a word write and a block write with 470ff596d0Spbrook length 1, so pass the whole data block including the length byte 480ff596d0Spbrook (if present). The device is responsible figuring out what type of 490ff596d0Spbrook command this is. */ 500ff596d0Spbrook void (*write_data)(SMBusDevice *dev, uint8_t cmd, uint8_t *buf, int len); 513f582262Sbalrog /* Likewise we can't distinguish between different reads, or even know 520ff596d0Spbrook the length of the read until the read is complete, so read data a 530ff596d0Spbrook byte at a time. The device is responsible for adding the length 540ff596d0Spbrook byte on block reads. */ 550ff596d0Spbrook uint8_t (*read_data)(SMBusDevice *dev, uint8_t cmd, int n); 56b5ea9327SAnthony Liguori } SMBusDeviceClass; 570ff596d0Spbrook 58b5ea9327SAnthony Liguori struct SMBusDevice { 59b5ea9327SAnthony Liguori /* The SMBus protocol is implemented on top of I2C. */ 60b5ea9327SAnthony Liguori I2CSlave i2c; 61b5ea9327SAnthony Liguori 62b5ea9327SAnthony Liguori /* Remaining fields for internal use only. */ 63b5ea9327SAnthony Liguori int mode; 64b5ea9327SAnthony Liguori int data_len; 65b5ea9327SAnthony Liguori uint8_t data_buf[34]; /* command + len + 32 bytes of data. */ 66b5ea9327SAnthony Liguori uint8_t command; 67b5ea9327SAnthony Liguori }; 68b5ea9327SAnthony Liguori 69b5ea9327SAnthony Liguori #endif 70